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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include "pch.h"
Go to the source code of this file.
Functions | |
static void | pch_disable_devfn (struct device *dev) |
void | pch_enable (struct device *dev) |
Variables | |
struct chip_operations | southbridge_intel_ibexpeak_ops |
Definition at line 11 of file pch.c.
References BUC, pci_path::devfn, FD, FD2, device::path, PCH_DISABLE_EHCI1, PCH_DISABLE_EHCI2, PCH_DISABLE_GBE, PCH_DISABLE_HD_AUDIO, PCH_DISABLE_IDER, PCH_DISABLE_KT, PCH_DISABLE_LPC, PCH_DISABLE_MEI1, PCH_DISABLE_MEI2, PCH_DISABLE_PCIE, PCH_DISABLE_SATA1, PCH_DISABLE_SATA2, PCH_DISABLE_SMBUS, PCH_DISABLE_THERMAL, device_path::pci, PCI_DEVFN, PCI_FUNC, and RCBA32_OR.
Definition at line 66 of file pch.c.
References BIOS_DEBUG, dev_path(), device::enabled, pch_disable_devfn(), PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_COMMAND_SERR, pci_or_config16(), pci_read_config16(), pci_write_config16(), and printk.
struct chip_operations southbridge_intel_ibexpeak_ops |