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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <string.h>
#include "chip.h"
#include "pch.h"
Go to the source code of this file.
Macros | |
#define | IOBP_RETRY 1000 |
Functions | |
int | pch_silicon_revision (void) |
int | pch_silicon_type (void) |
static int | pch_silicon_supported (int type, int rev) |
static int | iobp_poll (void) |
void | pch_iobp_update (u32 address, u32 andvalue, u32 orvalue) |
static void | pch_hide_devfn (unsigned int devfn) |
static int | pch_pcie_check_set_enabled (struct device *dev) |
static void | pch_pcie_function_swap (u8 old_fn, u8 new_fn) |
static void | pch_pcie_devicetree_update (struct southbridge_intel_bd82x6x_config *config) |
static void | pch_pcie_enable (struct device *dev) |
void | pch_enable (struct device *dev) |
Variables | |
static u32 | new_rpfn |
struct chip_operations | southbridge_intel_bd82x6x_ops |
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inlinestatic |
Definition at line 70 of file pch.c.
References BIOS_ERR, IOBP_RETRY, IOBPS, printk, RCBA32, and udelay().
Referenced by pch_iobp_update().
Definition at line 404 of file pch.c.
References BIOS_DEBUG, dev_path(), pci_path::devfn, device::enabled, device::path, pch_hide_devfn(), PCH_PCIE_DEV_SLOT, pch_pcie_enable(), device_path::pci, pci_and_config16(), PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_COMMAND_SERR, pci_or_config16(), PCI_SLOT, and printk.
Referenced by intel_me_hide(), and pch_lpc_enable().
Definition at line 132 of file pch.c.
References FD, FD2, PCH_DISABLE_EHCI1, PCH_DISABLE_EHCI2, PCH_DISABLE_HD_AUDIO, PCH_DISABLE_IDER, PCH_DISABLE_KT, PCH_DISABLE_LPC, PCH_DISABLE_MEI1, PCH_DISABLE_MEI2, PCH_DISABLE_P2P, PCH_DISABLE_PCIE, PCH_DISABLE_SATA1, PCH_DISABLE_SATA2, PCH_DISABLE_SMBUS, PCH_DISABLE_THERMAL, PCH_DISABLE_XHCI, pch_silicon_type(), PCH_TYPE_PPT, PCI_DEVFN, PCI_FUNC, and RCBA32_OR.
Referenced by pch_enable(), and pch_pcie_enable().
Definition at line 86 of file pch.c.
References address, BIOS_ERR, iobp_poll(), IOBPD, IOBPIRI, IOBPS, IOBPS_READ_AX, IOBPS_RW_BX, IOBPS_WRITE_AX, pch_silicon_supported(), PCH_STEP_B0, PCH_TYPE_CPT, printk, and RCBA32.
Referenced by adsp_init(), enable_clock_gating(), enable_lp_clock_gating(), lpt_lp_pm_init(), pch_cg_init(), pch_disable_devfn(), pch_enable_mphy(), pch_pm_init(), sata_init(), serialio_d21_mode(), serialio_d23_mode(), serialio_init_once(), uart_bootblock_init(), usb_ehci_clock_gating(), usb_xhci_clock_gating(), and xhci_a0_suspend_smm_workaround().
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Definition at line 197 of file pch.c.
References all_devices, BIOS_DEBUG, dev_path(), pci_path::devfn, device::path, device_path::pci, PCI_FUNC, PCI_SLOT, and printk.
Referenced by pch_pcie_enable().
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Definition at line 244 of file pch.c.
References all_devices, BIOS_DEBUG, config, pci_path::devfn, memcpy(), new_rpfn, device::next, device::path, PCH_PCIE_DEV_SLOT, device_path::pci, PCI_DEVFN, PCI_FUNC, PCI_SLOT, printk, and RPFN_FNGET.
Referenced by pch_pcie_enable().
Definition at line 301 of file pch.c.
References BIOS_DEBUG, BIOS_INFO, BIOS_SPEW, device::chip_info, config, dev_path(), pci_path::devfn, device::enabled, new_rpfn, device::path, pch_hide_devfn(), pch_pcie_check_set_enabled(), pch_pcie_devicetree_update(), pch_pcie_function_swap(), pch_silicon_supported(), PCH_STEP_B1, PCH_TYPE_CPT, device_path::pci, pci_and_config16(), PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_COMMAND_SERR, PCI_FUNC, pci_or_config16(), pci_or_config8(), pci_write_config8(), printk, RCBA32, RPFN, and RPFN_HIDE.
Referenced by pch_enable().
Definition at line 229 of file pch.c.
References BIOS_DEBUG, new_rpfn, printk, RPFN_FNGET, RPFN_FNMASK, and RPFN_FNSET.
Referenced by pch_pcie_enable().
int pch_silicon_revision | ( | void | ) |
Definition at line 14 of file pch.c.
References PCI_DEV, pci_read_config8(), PCI_REVISION_ID, and pcidev_on_root().
Referenced by pch_silicon_supported(), and xhci_a0_suspend_smm_workaround().
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Definition at line 44 of file pch.c.
References pch_silicon_revision(), pch_silicon_type(), PCH_TYPE_CPT, PCH_TYPE_PPT, and type.
Referenced by pch_iobp_update(), and pch_pcie_enable().
int pch_silicon_type | ( | void | ) |
Definition at line 29 of file pch.c.
References pch_type(), PCI_DEV, PCI_DEVICE_ID, pci_read_config8(), and pcidev_on_root().
Referenced by lpc_init(), pch_hide_devfn(), pch_silicon_supported(), and southbridge_smm_xhci_sleep().
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Definition at line 226 of file pch.c.
Referenced by pch_pcie_devicetree_update(), pch_pcie_enable(), and pch_pcie_function_swap().
struct chip_operations southbridge_intel_bd82x6x_ops |