coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/stages.h>
4 #include <console/console.h>
5 #include <delay.h>
6 #include <soc/emi.h>
7 #include <soc/mt6366.h>
8 #include <soc/pll_common.h>
9 #include <soc/regulator.h>
10 #include <soc/rtc.h>
11 
12 static void raise_little_cpu_freq(void)
13 {
16  udelay(200);
18  mt_pll_raise_cci_freq(1385 * MHz);
19 
20  printk(BIOS_INFO, "Check CPU freq: %u KHz, cci: %u KHz\n",
23 }
24 
26 {
27  mt6366_init();
29  rtc_boot();
30  mtk_dram_init();
31 }
__weak void platform_romstage_main(void)
Definition: romstage.c:10
void mainboard_set_regulator_vol(enum mtk_regulator regulator, uint32_t voltage_uv)
Definition: regulator.c:41
#define MHz
Definition: helpers.h:80
void mtk_dram_init(void)
Definition: memory.c:311
#define printk(level,...)
Definition: stdlib.h:16
#define BIOS_INFO
BIOS_INFO - Expected events.
Definition: loglevel.h:113
static void raise_little_cpu_freq(void)
Definition: romstage.c:12
void mt6366_init(void)
Definition: mt6366.c:942
void mt_pll_raise_little_cpu_freq(u32 freq)
Definition: pll.c:420
u32 mt_fmeter_get_freq_khz(enum fmeter_type type, u32 id)
Definition: pll.c:519
void mt_pll_raise_cci_freq(u32 freq)
Definition: pll.c:500
@ FMETER_ABIST
Definition: pll_common.h:77
@ MTK_REGULATOR_VPROC12
Definition: regulator.h:19
@ MTK_REGULATOR_VSRAM_PROC12
Definition: regulator.h:20
void rtc_boot(void)
Definition: rtc_mt6359p.c:315
void udelay(uint32_t us)
Definition: udelay.c:15