coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early_init.c File Reference
#include <stdint.h>
#include <device/pci_ops.h>
#include <southbridge/intel/i82801jx/i82801jx.h>
#include <option.h>
#include "x4x.h"
#include <console/console.h>
Include dependency graph for early_init.c:

Go to the source code of this file.

Functions

void x4x_early_init (void)
 
static void init_egress (void)
 
static void init_dmi (void)
 
void x4x_late_init (void)
 

Function Documentation

◆ init_dmi()

static void init_dmi ( void  )
static

Definition at line 119 of file early_init.c.

References BIOS_DEBUG, dmibar_clrbits32, dmibar_clrsetbits16(), dmibar_read16(), dmibar_read32(), dmibar_setbits32, dmibar_write32(), dmibar_write8(), DMICESTS, DMILCTL, DMIPVCCAP1, DMIUESTS, DMIVC0RCTL, DMIVC1RCTL, DMIVC1RSTS, printk, RCBA16, RCBA32, RCBA8, and VC1NP.

Referenced by x4x_late_init().

Here is the call graph for this function:
Here is the caller graph for this function:

◆ init_egress()

static void init_egress ( void  )
static

◆ x4x_early_init()

void x4x_early_init ( void  )

Definition at line 14 of file early_init.c.

References BOARD_DEVEN, D0EN, D0F0_CAPID0, D0F0_DEVEN, D0F0_DMIBAR_LO, D0F0_EPBAR_LO, D0F0_GGC, D0F0_MCHBAR_LO, D0F0_PAM, D1EN, DEFAULT_HECIBAR, get_uint_option(), HOST_BRIDGE, PCI_DEV, pci_read_config32(), pci_write_config16(), pci_write_config32(), pci_write_config8(), and PEG1EN.

Referenced by mainboard_romstage_entry().

Here is the call graph for this function:
Here is the caller graph for this function:

◆ x4x_late_init()

void x4x_late_init ( void  )

Definition at line 217 of file early_init.c.

References init_dmi(), and init_egress().

Referenced by mainboard_romstage_entry().

Here is the call graph for this function:
Here is the caller graph for this function: