coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c File Reference
Include dependency graph for mainboard.c:

Go to the source code of this file.

Functions

static void pirq_setup (void)
 
static void mainboard_enable (struct device *dev)
 

Variables

static const u8 mainboard_picr_data [FCH_INT_TABLE_SIZE]
 
static const u8 mainboard_intr_data [FCH_INT_TABLE_SIZE]
 
static const struct pirq_struct mainboard_pirq_data []
 
struct chip_operations mainboard_ops
 

Function Documentation

◆ mainboard_enable()

static void mainboard_enable ( struct device dev)
static

Definition at line 108 of file mainboard.c.

References misc_write8(), pirq_setup(), and pm_write8().

Here is the call graph for this function:

◆ pirq_setup()

static void pirq_setup ( void  )
static

Definition at line 97 of file mainboard.c.

References ARRAY_SIZE, intr_data_ptr, mainboard_intr_data, mainboard_picr_data, mainboard_pirq_data, picr_data_ptr, pirq_data_ptr, and pirq_data_size.

Referenced by mainboard_enable().

Here is the caller graph for this function:

Variable Documentation

◆ mainboard_intr_data

const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE]
static
Initial value:
= {
[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
[0x08] = 0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
[0x10] = 0x09,0x1F,0x1F,0x10,0x1F,0x12,0x1F,
[0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
[0x30] = 0x12,0x11,0x12,0x11,0x12,0x11,0x12,
[0x40] = 0x11,0x13,
[0x50] = 0x10,0x11,0x12,0x13
}

Definition at line 43 of file mainboard.c.

Referenced by pirq_setup().

◆ mainboard_ops

struct chip_operations mainboard_ops
Initial value:
= {
.enable_dev = mainboard_enable,
}
static void mainboard_enable(struct device *dev)
Definition: mainboard.c:108

Definition at line 108 of file mainboard.c.

◆ mainboard_picr_data

const u8 mainboard_picr_data[FCH_INT_TABLE_SIZE]
static
Initial value:
= {
[0x00] = 0x0A,0x0B,0x0A,0x0B,0x0A,0x0B,0x0A,0x0B,
[0x08] = 0x00,0xF0,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
[0x10] = 0x1F,0x1F,0x1F,0x0A,0x1F,0x1F,0x1F,
[0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
[0x30] = 0x0A,0x0B,0x0A,0x0B,0x0A,0x0B,0x0A,
[0x40] = 0x0B,0x0B,
[0x50] = 0x0A,0x0B,0x0A,0x0B
}

Definition at line 26 of file mainboard.c.

Referenced by pirq_setup().

◆ mainboard_pirq_data

const struct pirq_struct mainboard_pirq_data[]
static
Initial value:
= {
}
@ PIRQ_A
Definition: acpi_pirq_gen.h:22
@ PIRQ_C
Definition: acpi_pirq_gen.h:24
@ PIRQ_G
Definition: acpi_pirq_gen.h:28
@ PIRQ_H
Definition: acpi_pirq_gen.h:29
@ PIRQ_E
Definition: acpi_pirq_gen.h:26
@ PIRQ_D
Definition: acpi_pirq_gen.h:25
@ PIRQ_F
Definition: acpi_pirq_gen.h:27
@ PIRQ_B
Definition: acpi_pirq_gen.h:23
#define NB_PCIE_PORT3_DEVFN
Definition: pci_devs.h:35
#define NB_PCIE_PORT1_DEVFN
Definition: pci_devs.h:33
#define GFX_DEVFN
Definition: pci_devs.h:13
#define PIRQ_SATA
#define PIRQ_SMBUS
#define PIRQ_NC
#define SMBUS_DEVFN
Definition: pci_devs.h:117
#define SATA_DEVFN
Definition: pci_devs.h:83
#define PIRQ_HDA
#define EHCI1_DEVFN
Definition: pci_devs.h:170
#define PIRQ_OHCI2
#define PIRQ_OHCI1
#define PIRQ_EHCI3
#define PIRQ_IDE
#define PIRQ_OHCI4
#define PIRQ_OHCI3
#define PIRQ_EHCI2
#define PIRQ_EHCI1
#define HDA_DEVFN
Definition: pci_devs.h:69
#define OHCI4_DEVFN
Definition: pci_devs.h:37
#define OHCI1_DEVFN
Definition: pci_devs.h:34
#define EHCI3_DEVFN
Definition: pci_devs.h:49
#define SB_PCI_PORT_DEVFN
Definition: pci_devs.h:82
#define OHCI3_DEVFN
Definition: pci_devs.h:36
#define EHCI2_DEVFN
Definition: pci_devs.h:48
#define OHCI2_DEVFN
Definition: pci_devs.h:35
#define IDE_DEVFN
Definition: pci_devs.h:56

Definition at line 43 of file mainboard.c.

Referenced by pirq_setup().