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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <types.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/em64t101_save_state.h>
#include <elog.h>
#include <halt.h>
#include <option.h>
#include <southbridge/intel/common/finalize.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>
#include <soc/nvs.h>
#include <smmstore.h>
#include "me.h"
#include "pch.h"
Go to the source code of this file.
Macros | |
#define | IOTRAP(x) (trap_sts & (1 << x)) |
Typedefs | |
typedef void(* | smi_handler_t) (void) |
Functions | |
int | southbridge_io_trap_handler (int smif) |
void | southbridge_smi_set_eos (void) |
Set the EOS bit. More... | |
static void | busmaster_disable_on_bus (int bus) |
static int | power_on_after_fail (void) |
static void | southbridge_smi_sleep (void) |
static em64t101_smm_state_save_area_t * | smi_apmc_find_state_save (u8 cmd) |
static void | southbridge_smi_gsmi (void) |
static void | southbridge_smi_store (void) |
static void | southbridge_smi_apmc (void) |
static void | southbridge_smi_pm1 (void) |
static void | southbridge_smi_gpe0 (void) |
static void | southbridge_smi_gpi (void) |
static void | southbridge_smi_mc (void) |
static void | southbridge_smi_tco (void) |
static void | southbridge_smi_periodic (void) |
static void | southbridge_smi_monitor (void) |
void | southbridge_smi_handler (void) |
Interrupt handler for SMI#. More... | |
Variables | |
static smi_handler_t | southbridge_smi [32] |
Definition at line 441 of file smihandler.c.
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Definition at line 47 of file smihandler.c.
References pci_and_config16(), PCI_COMMAND, PCI_COMMAND_MASTER, PCI_DEV, PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_CARDBUS, PCI_PRIMARY_BUS, pci_read_config32(), pci_read_config8(), PCI_VENDOR_ID, and val.
Referenced by southbridge_smi_sleep().
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Definition at line 79 of file smihandler.c.
References get_uint_option(), inb(), MAINBOARD_POWER_ON, and outb().
Referenced by southbridge_smi_sleep().
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Definition at line 189 of file smihandler.c.
References APM_CNT, NULL, and smm_get_save_state().
Referenced by southbridge_smi_gsmi(), and southbridge_smi_store().
int southbridge_io_trap_handler | ( | int | smif | ) |
Definition at line 22 of file smihandler.c.
References BIOS_DEBUG, gnvs, printk, and global_nvs::smif.
Referenced by io_trap_handler().
Definition at line 261 of file smihandler.c.
References APM_CNT_ACPI_DISABLE, APM_CNT_ACPI_ENABLE, APM_CNT_ELOG_GSMI, APM_CNT_FINALIZE, APM_CNT_ROUTE_ALL_XHCI, APM_CNT_SMMSTORE, apm_get_apmc(), BIOS_DEBUG, CONFIG, disable_pm1_control(), enable_pm1_control(), intel_cpu_haswell_finalize_smm(), intel_pch_finalize_smm(), mainboard_smi_apmc(), printk, SCI_EN, southbridge_smi_gsmi(), southbridge_smi_store(), and usb_xhci_route_all().
Definition at line 316 of file smihandler.c.
References clear_gpe_status().
Definition at line 321 of file smihandler.c.
References clear_alt_smi_status(), and mainboard_smi_gpi().
Definition at line 220 of file smihandler.c.
References APM_CNT_ELOG_GSMI, gsmi_exec(), and smi_apmc_find_state_save().
Referenced by southbridge_smi_apmc().
Interrupt handler for SMI#.
Definition at line 481 of file smihandler.c.
References BIOS_DEBUG, clear_smi_status(), printk, and southbridge_smi.
Definition at line 329 of file smihandler.c.
References BIOS_DEBUG, get_pmbase(), inl(), MCSMI_EN, printk, and SMI_EN.
Definition at line 383 of file smihandler.c.
References BIOS_DEBUG, gnvs, io_trap_handler(), IOTRAP, mask, printk, RCBA32, global_nvs::smif, and void().
Definition at line 372 of file smihandler.c.
References BIOS_DEBUG, get_pmbase(), inl(), PERIODIC_EN, printk, and SMI_EN.
Definition at line 301 of file smihandler.c.
References clear_pm1_status(), disable_pm1_control(), elog_gsmi_add_event(), ELOG_TYPE_POWER_BUTTON, enable_pm1_control(), PWRBTN_STS, SLP_EN, and SLP_TYP_S5.
Set the EOS bit.
Definition at line 42 of file smihandler.c.
References enable_smi(), EOS, smi_read32(), SMI_REG_SMITRIG0, smi_write32(), and SMITRG0_EOS.
Referenced by smi_set_eos().
Definition at line 94 of file smihandler.c.
References ACPI_S0, ACPI_S1, ACPI_S3, ACPI_S4, ACPI_S5, BIOS_DEBUG, BIOS_SPEW, busmaster_disable_on_bus(), disable_all_gpe(), disable_pm1_control(), disable_smi(), elog_gsmi_add_event_byte(), ELOG_TYPE_ACPI_ENTER, enable_pm1_control(), GEN_PMCON_3, get_pmbase(), halt(), inl(), mainboard_smi_sleep(), PCH_EHCI1_DEV, PCH_EHCI2_DEV, PCH_LPC_DEV, PCH_XHCI_DEV, pci_and_config8(), pci_or_config8(), PM1_CNT, pmbase, power_on_after_fail(), printk, SCI_EN, SLP_EN, SLP_SMI_EN, SLP_TYP, usb_ehci_sleep_prepare(), usb_xhci_sleep_prepare(), and wbinvd().
Definition at line 241 of file smihandler.c.
References APM_CNT_SMMSTORE, smi_apmc_find_state_save(), and smmstore_exec().
Referenced by southbridge_smi_apmc().
Definition at line 340 of file smihandler.c.
References BIOS_CNTL, BIOS_DEBUG, clear_tco_status(), PCH_LPC_DEV, pci_read_config8(), pci_write_config8(), and printk.
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Definition at line 443 of file smihandler.c.