coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <bootstate.h>
4 #include <arch/mmio.h>
5 #include <delay.h>
6 #include <bootmode.h>
7 #include <device/device.h>
8 #include <device/pci.h>
9 #include <soc/pci_devs.h>
11 
12 static void panel_power_on(uintptr_t igd_bar)
13 {
14  setbits32((void *)(igd_bar + PCH_PP_CONTROL), PANEL_POWER_ON);
15 }
16 
17 static void panel_reset_assert(uintptr_t igd_bar)
18 {
19  clrsetbits32((void *)(igd_bar + PCH_GPIOB),
22 }
23 
24 static void panel_reset_deassert(uintptr_t igd_bar)
25 {
26  const uint32_t data32 = GPIO_CLOCK_VAL_OUT |
28  setbits32((void *)(igd_bar + PCH_GPIOB), data32);
29 }
30 
31 /*
32  * Bugzzy uses panel-built-in touch screen, it needs to set panel power and
33  * reset signal to high for touch screen to work.
34  * On user mode, coreboot doesn't initialize graphics since there is no screen
35  * display before OS. We would add this WA to initialize required signals on
36  * user mode.
37  */
38 static void wa_init_display_signal(void *unused)
39 {
40  struct device *igd_dev = pcidev_path_on_root(SA_DEVFN_IGD);
41  uintptr_t igd_bar;
42 
43  if (display_init_required() || !igd_dev)
44  return;
45 
46  igd_bar = find_resource(igd_dev, PCI_BASE_ADDRESS_0)->base;
47  if (!igd_bar)
48  return;
49 
50  panel_power_on(igd_bar);
51  mdelay(20);
52  panel_reset_deassert(igd_bar);
53  mdelay(2);
54  panel_reset_assert(igd_bar);
55  mdelay(2);
56  panel_reset_deassert(igd_bar);
57 }
58 
int display_init_required(void)
Definition: bootmode.c:22
@ BS_POST_DEVICE
Definition: bootstate.h:84
@ BS_ON_ENTRY
Definition: bootstate.h:95
void mdelay(unsigned int msecs)
Definition: delay.c:2
DEVTREE_CONST struct device * pcidev_path_on_root(pci_devfn_t devfn)
Definition: device_const.c:255
struct resource * find_resource(const struct device *dev, unsigned int index)
Return an existing resource structure for a given index.
Definition: device_util.c:394
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, init_store, NULL)
#define PCH_GPIOB
Definition: i915_reg.h:3317
#define GPIO_CLOCK_VAL_MASK
Definition: i915_reg.h:812
#define GPIO_CLOCK_DIR_MASK
Definition: i915_reg.h:809
#define PCH_PP_CONTROL
Definition: i915_reg.h:3754
#define GPIO_CLOCK_DIR_OUT
Definition: i915_reg.h:811
#define PANEL_POWER_ON
Definition: i915_reg.h:3761
#define GPIO_CLOCK_VAL_OUT
Definition: i915_reg.h:813
#define setbits32(addr, set)
Definition: mmio.h:21
#define clrsetbits32(addr, clear, set)
Definition: mmio.h:16
static void panel_reset_deassert(uintptr_t igd_bar)
Definition: ramstage.c:24
static void wa_init_display_signal(void *unused)
Definition: ramstage.c:38
static void panel_reset_assert(uintptr_t igd_bar)
Definition: ramstage.c:17
static void panel_power_on(uintptr_t igd_bar)
Definition: ramstage.c:12
#define PCI_BASE_ADDRESS_0
Definition: pci_def.h:63
#define SA_DEVFN_IGD
Definition: pci_devs.h:32
#define NULL
Definition: stddef.h:19
unsigned int uint32_t
Definition: stdint.h:14
unsigned long uintptr_t
Definition: stdint.h:21
Definition: device.h:107
resource_t base
Definition: resource.h:45