#include <commonlib/bsd/helpers.h>
#include <console/console.h>
#include <delay.h>
#include <device/mmio.h>
#include <edid.h>
#include <soc/addressmap.h>
#include <soc/dptx.h>
#include <soc/dptx_hal.h>
#include <soc/dptx_reg.h>
#include <soc/dp_intf.h>
#include <string.h>

Include dependency graph for dptx.c:

Macros
#define	ONE_BLOCK_SIZE 128

#define	DP_LINK_CONSTANT_N_VALUE 0x8000

#define	DP_LINK_STATUS_SIZE 6

#define	DP_LANE0_1_STATUS 0x202

#define	DP_LANE2_3_STATUS 0x203

#define	DP_LANE_CR_DONE (1 << 0)

#define	DP_LANE_CHANNEL_EQ_DONE (1 << 1)

#define	DP_LANE_SYMBOL_LOCKED (1 << 2)

#define	DP_BRANCH_OUI_HEADER_SIZE 0xc

#define	DP_RECEIVER_CAP_SIZE 0xf

#define	DP_DSC_RECEIVER_CAP_SIZE 0xf

#define	EDP_PSR_RECEIVER_CAP_SIZE 2

#define	EDP_DISPLAY_CTL_CAP_SIZE 3

#define	DP_LTTPR_COMMON_CAP_SIZE 8

#define	DP_LTTPR_PHY_CAP_SIZE 3

#define	DP_TRAINING_AUX_RD_INTERVAL 0x00e

#define	DP_TRAINING_AUX_RD_MASK 0x7f

#define	DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT (1 << 7)

#define	DP_EDP_DPCD_REV 0x700

#define	DP_EDP_11 0x00

#define	DP_EDP_12 0x01

#define	DP_EDP_13 0x02

#define	DP_EDP_14 0x03

#define	DP_EDP_14a 0x04

#define	DP_EDP_14b 0x05

#define	DP_DPCD_REV 0x000

#define	DP_DPCD_REV_10 0x10

#define	DP_DPCD_REV_11 0x11

#define	DP_DPCD_REV_12 0x12

#define	DP_DPCD_REV_13 0x13

#define	DP_DPCD_REV_14 0x14

#define	DP_CHANNEL_EQ_BITS

#define	DP_LANE_ALIGN_STATUS_UPDATED 0x204

#define	DP_INTERLANE_ALIGN_DONE (1 << 0)

#define	DP_DOWNSTREAM_PORT_STATUS_CHANGED (1 << 6)

#define	DP_LINK_STATUS_UPDATED (1 << 7)

#define	DP_SINK_STATUS 0x205

#define	DP_RECEIVE_PORT_0_STATUS (1 << 0)

#define	DP_RECEIVE_PORT_1_STATUS (1 << 1)

#define	DP_STREAM_REGENERATION_STATUS (1 << 2)

#define	DP_AUX_MAX_PAYLOAD_BYTES 16

#define	MAX_LANECOUNT 4

#define	DPTX_TRAIN_RETRY_LIMIT 0x8

#define	DPTX_TRAIN_MAX_ITERATION 0x5

#define	HPD_INT_EVNET BIT(3)

#define	HPD_CONNECT BIT(2)

#define	HPD_DISCONNECT BIT(1)

#define	HPD_INITIAL_STATE 0

Enumerations
enum	{ DP_LANECOUNT_1 = 0x1 , DP_LANECOUNT_2 = 0x2 , DP_LANECOUNT_4 = 0x4 }

enum	{ DP_VERSION_11 = 0x11 , DP_VERSION_12 = 0x12 , DP_VERSION_14 = 0x14 , DP_VERSION_12_14 = 0x16 , DP_VERSION_14_14 = 0x17 , DP_VERSION_MAX }

enum	{ DPTX_SWING0 = 0x00 , DPTX_SWING1 = 0x01 , DPTX_SWING2 = 0x02 , DPTX_SWING3 = 0x03 }

enum	{ DPTX_PREEMPHASIS0 = 0x00 , DPTX_PREEMPHASIS1 = 0x01 , DPTX_PREEMPHASIS2 = 0x02 , DPTX_PREEMPHASIS3 = 0x03 }

enum	{ DPTX_PASS = 0 , DPTX_PLUG_OUT = 1 , DPTX_TIMEOUT = 2 , DPTX_AUTH_FAIL = 3 , DPTX_EDID_FAIL = 4 , DPTX_TRANING_FAIL = 5 , DPTX_TRANING_STATE_CHANGE = 6 }

enum	{ FEC_ERROR_COUNT_DISABLE = 0x0 , FEC_UNCORRECTED_BLOCK_ERROR_COUNT = 0x1 , FEC_CORRECTED_BLOCK_ERROR_COUNT = 0x2 , FEC_BIT_ERROR_COUNT = 0x3 , FEC_PARITY_BLOCK_ERROR_COUNT = 0x4 , FEC_PARITY_BIT_ERROR_COUNT = 0x5 }

enum	{ DPTX_NTSTATE_STARTUP = 0x0 , DPTX_NTSTATE_CHECKCAP = 0x1 , DPTX_NTSTATE_CHECKEDID = 0x2 , DPTX_NTSTATE_TRAINING_PRE = 0x3 , DPTX_NTSTATE_TRAINING = 0x4 , DPTX_NTSTATE_CHECKTIMING = 0x5 , DPTX_NTSTATE_NORMAL = 0x6 , DPTX_NTSTATE_POWERSAVE = 0x7 , DPTX_NTSTATE_DPIDLE = 0x8 , DPTX_NTSTATE_MAX }

enum	{ DPTX_DISP_NONE = 0 , DPTX_DISP_RESUME = 1 , DPTX_DISP_SUSPEND = 2 }

enum	{ TRAIN_STEP_SUCCESS = 0 , TRAIN_STEP_FAIL_BREAK = 1 , TRAIN_STEP_FAIL_NOT_BREAK = 2 }

Functions
static bool	dptx_auxwrite_bytes (struct mtk_dp mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 data)

static bool	dptx_auxwrite_dpcd (struct mtk_dp mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 data)

static bool	dptx_auxread_bytes (struct mtk_dp mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 data)

static bool	dptx_auxread_dpcd (struct mtk_dp mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 rxbuf)

static int	dptx_get_edid (struct mtk_dp mtk_dp, struct edid out)

static u8	dptx_link_status (const u8 link_status[DP_LINK_STATUS_SIZE], int r)

static u8	dptx_get_lane_status (const u8 link_status[DP_LINK_STATUS_SIZE], int lane)

static bool	dptx_clock_recovery_ok (const u8 link_status[DP_LINK_STATUS_SIZE], int lane_count)

static void	dptx_link_train_clock_recovery_delay (const u8 dpcd[DP_RECEIVER_CAP_SIZE])

static void	dptx_link_train_channel_eq_delay (const u8 dpcd[DP_RECEIVER_CAP_SIZE])

static bool	dptx_channel_eq_ok (const u8 link_status[DP_LINK_STATUS_SIZE], int lane_count)

static void	dptx_videomute (struct mtk_dp *mtk_dp, bool enable)

static void	dptx_fec_ready (struct mtk_dp *mtk_dp, u8 err_cnt_sel)

static void	dptx_init_variable (struct mtk_dp *mtk_dp)

static bool	dptx_check_res_sample_rate (const struct edid *edid)

static void	dptx_setsdp_downcnt_init (struct mtk_dp *mtk_dp, u16 sram_read_start)

static void	dptx_setsdp_downcnt_init_inhblanking (struct mtk_dp *mtk_dp)

static void	dptx_set_tu (struct mtk_dp *mtk_dp)

static void	dptx_set_misc (struct mtk_dp *mtk_dp)

static void	dptx_set_dptxout (struct mtk_dp *mtk_dp)

static bool	dptx_training_checkswingpre (struct mtk_dp mtk_dp, u8 target_lane_count, const u8 dpcp202_x, u8 *dpcp_buf)

static int	dptx_train_tps1 (struct mtk_dp mtk_dp, u8 target_lanecount, int status_ctrl, int iteration, u8 dpcp_buffer, u8 *dpcd206)

static int	dptx_train_tps2_3 (struct mtk_dp mtk_dp, u8 target_lanecount, int status_ctrl, int iteration, u8 dpcp_buffer, u8 *dpcd206)

static int	dptx_trainingflow (struct mtk_dp *mtk_dp, u8 lanerate, u8 lanecount)

static void	dptx_check_sinkcap (struct mtk_dp *mtk_dp)

static void	dptx_training_changemode (struct mtk_dp *mtk_dp)

static int	dptx_set_trainingstart (struct mtk_dp *mtk_dp)

static void	dptx_init_port (struct mtk_dp *mtk_dp)

static void	dptx_video_enable (struct mtk_dp *mtk_dp, bool enable)

static void	dptx_set_color_format (struct mtk_dp *mtk_dp, u8 color_format)

static void	dptx_set_color_depth (struct mtk_dp *mtk_dp, u8 color_depth)

static void	dptx_video_config (struct mtk_dp *mtk_dp)

int	mtk_edp_init (struct edid *edid)

Macro Definition Documentation

◆ DP_AUX_MAX_PAYLOAD_BYTES

#define DP_AUX_MAX_PAYLOAD_BYTES 16

Definition at line 68 of file dptx.c.

◆ DP_BRANCH_OUI_HEADER_SIZE

#define DP_BRANCH_OUI_HEADER_SIZE 0xc

Definition at line 26 of file dptx.c.

◆ DP_CHANNEL_EQ_BITS

#define DP_CHANNEL_EQ_BITS

Value:

                          (DP_LANE_CR_DONE | \
                          DP_LANE_CHANNEL_EQ_DONE | \
                          DP_LANE_SYMBOL_LOCKED)

Definition at line 54 of file dptx.c.

◆ DP_DOWNSTREAM_PORT_STATUS_CHANGED

#define DP_DOWNSTREAM_PORT_STATUS_CHANGED (1 << 6)

Definition at line 60 of file dptx.c.

◆ DP_DPCD_REV

#define DP_DPCD_REV 0x000

Definition at line 47 of file dptx.c.

◆ DP_DPCD_REV_10

#define DP_DPCD_REV_10 0x10

Definition at line 48 of file dptx.c.

◆ DP_DPCD_REV_11

#define DP_DPCD_REV_11 0x11

Definition at line 49 of file dptx.c.

◆ DP_DPCD_REV_12

#define DP_DPCD_REV_12 0x12

Definition at line 50 of file dptx.c.

◆ DP_DPCD_REV_13

#define DP_DPCD_REV_13 0x13

Definition at line 51 of file dptx.c.

◆ DP_DPCD_REV_14

#define DP_DPCD_REV_14 0x14

Definition at line 52 of file dptx.c.

◆ DP_DSC_RECEIVER_CAP_SIZE

#define DP_DSC_RECEIVER_CAP_SIZE 0xf

Definition at line 28 of file dptx.c.

◆ DP_EDP_11

#define DP_EDP_11 0x00

Definition at line 39 of file dptx.c.

◆ DP_EDP_12

#define DP_EDP_12 0x01

Definition at line 40 of file dptx.c.

◆ DP_EDP_13

#define DP_EDP_13 0x02

Definition at line 41 of file dptx.c.

◆ DP_EDP_14

#define DP_EDP_14 0x03

Definition at line 42 of file dptx.c.

◆ DP_EDP_14a

#define DP_EDP_14a 0x04

Definition at line 43 of file dptx.c.

◆ DP_EDP_14b

#define DP_EDP_14b 0x05

Definition at line 44 of file dptx.c.

◆ DP_EDP_DPCD_REV

#define DP_EDP_DPCD_REV 0x700

Definition at line 38 of file dptx.c.

◆ DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT

#define DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT (1 << 7)

Definition at line 36 of file dptx.c.

◆ DP_INTERLANE_ALIGN_DONE

#define DP_INTERLANE_ALIGN_DONE (1 << 0)

Definition at line 59 of file dptx.c.

◆ DP_LANE0_1_STATUS

#define DP_LANE0_1_STATUS 0x202

Definition at line 20 of file dptx.c.

◆ DP_LANE2_3_STATUS

#define DP_LANE2_3_STATUS 0x203

Definition at line 21 of file dptx.c.

◆ DP_LANE_ALIGN_STATUS_UPDATED

#define DP_LANE_ALIGN_STATUS_UPDATED 0x204

Definition at line 58 of file dptx.c.

◆ DP_LANE_CHANNEL_EQ_DONE

#define DP_LANE_CHANNEL_EQ_DONE (1 << 1)

Definition at line 23 of file dptx.c.

◆ DP_LANE_CR_DONE

#define DP_LANE_CR_DONE (1 << 0)

Definition at line 22 of file dptx.c.

◆ DP_LANE_SYMBOL_LOCKED

#define DP_LANE_SYMBOL_LOCKED (1 << 2)

Definition at line 24 of file dptx.c.

◆ DP_LINK_CONSTANT_N_VALUE

#define DP_LINK_CONSTANT_N_VALUE 0x8000

Definition at line 17 of file dptx.c.

◆ DP_LINK_STATUS_SIZE

#define DP_LINK_STATUS_SIZE 6

Definition at line 18 of file dptx.c.

◆ DP_LINK_STATUS_UPDATED

#define DP_LINK_STATUS_UPDATED (1 << 7)

Definition at line 61 of file dptx.c.

◆ DP_LTTPR_COMMON_CAP_SIZE

#define DP_LTTPR_COMMON_CAP_SIZE 8

Definition at line 31 of file dptx.c.

◆ DP_LTTPR_PHY_CAP_SIZE

#define DP_LTTPR_PHY_CAP_SIZE 3

Definition at line 32 of file dptx.c.

◆ DP_RECEIVE_PORT_0_STATUS

#define DP_RECEIVE_PORT_0_STATUS (1 << 0)

Definition at line 64 of file dptx.c.

◆ DP_RECEIVE_PORT_1_STATUS

#define DP_RECEIVE_PORT_1_STATUS (1 << 1)

Definition at line 65 of file dptx.c.

◆ DP_RECEIVER_CAP_SIZE

#define DP_RECEIVER_CAP_SIZE 0xf

Definition at line 27 of file dptx.c.

◆ DP_SINK_STATUS

#define DP_SINK_STATUS 0x205

Definition at line 63 of file dptx.c.

◆ DP_STREAM_REGENERATION_STATUS

#define DP_STREAM_REGENERATION_STATUS (1 << 2)

Definition at line 66 of file dptx.c.

◆ DP_TRAINING_AUX_RD_INTERVAL

#define DP_TRAINING_AUX_RD_INTERVAL 0x00e

Definition at line 34 of file dptx.c.

◆ DP_TRAINING_AUX_RD_MASK

#define DP_TRAINING_AUX_RD_MASK 0x7f

Definition at line 35 of file dptx.c.

◆ DPTX_TRAIN_MAX_ITERATION

#define DPTX_TRAIN_MAX_ITERATION 0x5

Definition at line 146 of file dptx.c.

◆ DPTX_TRAIN_RETRY_LIMIT

#define DPTX_TRAIN_RETRY_LIMIT 0x8

Definition at line 145 of file dptx.c.

◆ EDP_DISPLAY_CTL_CAP_SIZE

#define EDP_DISPLAY_CTL_CAP_SIZE 3

Definition at line 30 of file dptx.c.

◆ EDP_PSR_RECEIVER_CAP_SIZE

#define EDP_PSR_RECEIVER_CAP_SIZE 2

Definition at line 29 of file dptx.c.

◆ HPD_CONNECT

#define HPD_CONNECT BIT(2)

Definition at line 149 of file dptx.c.

◆ HPD_DISCONNECT

#define HPD_DISCONNECT BIT(1)

Definition at line 150 of file dptx.c.

◆ HPD_INITIAL_STATE

#define HPD_INITIAL_STATE 0

Definition at line 151 of file dptx.c.

◆ HPD_INT_EVNET

#define HPD_INT_EVNET BIT(3)

Definition at line 148 of file dptx.c.

◆ MAX_LANECOUNT

#define MAX_LANECOUNT 4

Definition at line 70 of file dptx.c.

◆ ONE_BLOCK_SIZE

#define ONE_BLOCK_SIZE 128

Definition at line 15 of file dptx.c.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
DP_LANECOUNT_1
DP_LANECOUNT_2
DP_LANECOUNT_4

Definition at line 72 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
DP_VERSION_11
DP_VERSION_12
DP_VERSION_14
DP_VERSION_12_14
DP_VERSION_14_14
DP_VERSION_MAX

Definition at line 78 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
DPTX_SWING0
DPTX_SWING1
DPTX_SWING2
DPTX_SWING3

Definition at line 87 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
DPTX_PREEMPHASIS0
DPTX_PREEMPHASIS1
DPTX_PREEMPHASIS2
DPTX_PREEMPHASIS3

Definition at line 94 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
DPTX_PASS
DPTX_PLUG_OUT
DPTX_TIMEOUT
DPTX_AUTH_FAIL
DPTX_EDID_FAIL
DPTX_TRANING_FAIL
DPTX_TRANING_STATE_CHANGE

Definition at line 101 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
FEC_ERROR_COUNT_DISABLE
FEC_UNCORRECTED_BLOCK_ERROR_COUNT
FEC_CORRECTED_BLOCK_ERROR_COUNT
FEC_BIT_ERROR_COUNT
FEC_PARITY_BLOCK_ERROR_COUNT
FEC_PARITY_BIT_ERROR_COUNT

Definition at line 111 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
DPTX_NTSTATE_STARTUP
DPTX_NTSTATE_CHECKCAP
DPTX_NTSTATE_CHECKEDID
DPTX_NTSTATE_TRAINING_PRE
DPTX_NTSTATE_TRAINING
DPTX_NTSTATE_CHECKTIMING
DPTX_NTSTATE_NORMAL
DPTX_NTSTATE_POWERSAVE
DPTX_NTSTATE_DPIDLE
DPTX_NTSTATE_MAX

Definition at line 120 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
DPTX_DISP_NONE
DPTX_DISP_RESUME
DPTX_DISP_SUSPEND

Definition at line 133 of file dptx.c.

◆ anonymous enum

anonymous enum

Enumerator
TRAIN_STEP_SUCCESS
TRAIN_STEP_FAIL_BREAK
TRAIN_STEP_FAIL_NOT_BREAK

Definition at line 139 of file dptx.c.

Function Documentation

◆ dptx_auxread_bytes()

static bool dptx_auxread_bytes	(	struct mtk_dp *	mtk_dp,
		u8	cmd,
		u32	dpcd_addr,
		size_t	length,
		u8 *	data
	)

static

Definition at line 182 of file dptx.c.

References BIOS_ERR, dptx_hal_auxread_bytes(), length, mdelay(), printk, and retry.

Referenced by dptx_auxread_dpcd().

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◆ dptx_auxread_dpcd()

static bool dptx_auxread_dpcd	(	struct mtk_dp *	mtk_dp,
		u8	cmd,
		u32	dpcd_addr,
		size_t	length,
		u8 *	rxbuf
	)

static

Definition at line 195 of file dptx.c.

References DP_AUX_MAX_PAYLOAD_BYTES, dptx_auxread_bytes(), length, MIN, and offset.

Referenced by dptx_check_sinkcap(), dptx_fec_ready(), dptx_get_edid(), dptx_set_trainingstart(), dptx_train_tps1(), dptx_train_tps2_3(), and dptx_trainingflow().

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◆ dptx_auxwrite_bytes()

static bool dptx_auxwrite_bytes	(	struct mtk_dp *	mtk_dp,
		u8	cmd,
		u32	dpcd_addr,
		size_t	length,
		u8 *	data
	)

static

Definition at line 153 of file dptx.c.

References BIOS_ERR, dptx_hal_auxwrite_bytes(), length, mdelay(), printk, and retry.

Referenced by dptx_auxwrite_dpcd().

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◆ dptx_auxwrite_dpcd()

static bool dptx_auxwrite_dpcd	(	struct mtk_dp *	mtk_dp,
		u8	cmd,
		u32	dpcd_addr,
		size_t	length,
		u8 *	data
	)

static

Definition at line 166 of file dptx.c.

References DP_AUX_MAX_PAYLOAD_BYTES, dptx_auxwrite_bytes(), length, MIN, and offset.

Referenced by dptx_check_sinkcap(), dptx_fec_ready(), dptx_get_edid(), dptx_set_trainingstart(), dptx_train_tps1(), dptx_train_tps2_3(), and dptx_trainingflow().

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◆ dptx_channel_eq_ok()

static bool dptx_channel_eq_ok	(	const u8	link_status[DP_LINK_STATUS_SIZE],
		int	lane_count
	)

static

Definition at line 297 of file dptx.c.

References DP_CHANNEL_EQ_BITS, DP_INTERLANE_ALIGN_DONE, DP_LANE_ALIGN_STATUS_UPDATED, dptx_get_lane_status(), and dptx_link_status().

Referenced by dptx_train_tps2_3().

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◆ dptx_check_res_sample_rate()

static bool dptx_check_res_sample_rate ( const struct edid * edid )

inlinestatic

Definition at line 376 of file dptx.c.

References edid::mode, edid_mode::va, and edid_mode::vbl.

Referenced by dptx_setsdp_downcnt_init(), and dptx_setsdp_downcnt_init_inhblanking().

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◆ dptx_check_sinkcap()

static void dptx_check_sinkcap ( struct mtk_dp * mtk_dp )

static

Definition at line 868 of file dptx.c.

Referenced by mtk_edp_init().

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◆ dptx_clock_recovery_ok()

static bool dptx_clock_recovery_ok	(	const u8	link_status[DP_LINK_STATUS_SIZE],
		int	lane_count
	)

static

Definition at line 249 of file dptx.c.

References DP_LANE_CR_DONE, and dptx_get_lane_status().

Referenced by dptx_train_tps1(), and dptx_train_tps2_3().

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◆ dptx_fec_ready()

static void dptx_fec_ready	(	struct mtk_dp *	mtk_dp,
		u8	err_cnt_sel
	)

static

Definition at line 323 of file dptx.c.

References BIOS_DEBUG, BIT, DP_AUX_NATIVE_READ, DP_AUX_NATIVE_WRITE, dptx_auxread_dpcd(), dptx_auxwrite_dpcd(), mtk_dp::has_fec, and printk.

Referenced by dptx_check_sinkcap().

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◆ dptx_get_edid()

static int dptx_get_edid	(	struct mtk_dp *	mtk_dp,
		struct edid *	out
	)

static

Definition at line 211 of file dptx.c.

References BIOS_ERR, decode_edid(), DP_AUX_I2C_READ, DP_AUX_I2C_WRITE, DP_AUX_MAX_PAYLOAD_BYTES, dptx_auxread_dpcd(), dptx_auxwrite_dpcd(), mtk_dp::edid, EDID_CONFORMANT, ONE_BLOCK_SIZE, and printk.

Referenced by mtk_edp_init().

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◆ dptx_get_lane_status()

static u8 dptx_get_lane_status	(	const u8	link_status[DP_LINK_STATUS_SIZE],
		int	lane
	)

static

Definition at line 239 of file dptx.c.

References DP_LANE0_1_STATUS, dptx_link_status(), and s.

Referenced by dptx_channel_eq_ok(), and dptx_clock_recovery_ok().

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◆ dptx_init_port()

static void dptx_init_port ( struct mtk_dp * mtk_dp )

static

Definition at line 1049 of file dptx.c.

References dptx_hal_analog_power_en(), dptx_hal_aux_setting(), dptx_hal_digital_setting(), dptx_hal_digital_swreset(), dptx_hal_hpd_detect_setting(), dptx_hal_hpd_int_en(), dptx_hal_init_setting(), dptx_hal_phy_setidlepattern(), and dptx_hal_phy_setting().

Referenced by mtk_edp_init().

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◆ dptx_init_variable()

static void dptx_init_variable ( struct mtk_dp * mtk_dp )

static

Definition at line 355 of file dptx.c.

References dptx_info::depth, DP_COLOR_DEPTH_8BIT, DP_COLOR_FORMAT_RGB_444, DP_LANECOUNT_4, DP_LINKRATE_HBR2, DP_LINKRATE_HBR3, mtk_dp::dp_ready, DPTX_NTSTATE_STARTUP, mtk_dp::dsc_enable, EDP_BASE, dptx_info::format, mtk_dp::has_dsc, mtk_dp::has_fec, mtk_dp::info, dptx_training_info::linklane_count, dptx_training_info::linkrate, mtk_dp::power_on, mtk_dp::regs, dptx_training_info::sink_extcap_en, dptx_training_info::sink_ssc_en, dptx_training_info::sys_max_linkrate, dptx_training_info::tps3, dptx_training_info::tps4, mtk_dp::train_info, mtk_dp::training_state, and mtk_dp::video_enable.

Referenced by mtk_edp_init().

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◆ dptx_link_status()

static u8 dptx_link_status	(	const u8	link_status[DP_LINK_STATUS_SIZE],
		int	r
	)

static

Definition at line 234 of file dptx.c.

References DP_LANE0_1_STATUS.

Referenced by dptx_channel_eq_ok(), and dptx_get_lane_status().

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◆ dptx_link_train_channel_eq_delay()

static void dptx_link_train_channel_eq_delay ( const u8 dpcd[DP_RECEIVER_CAP_SIZE] )

static

Definition at line 280 of file dptx.c.

References BIOS_ERR, DP_TRAINING_AUX_RD_INTERVAL, DP_TRAINING_AUX_RD_MASK, mdelay(), and printk.

Referenced by dptx_train_tps2_3().

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◆ dptx_link_train_clock_recovery_delay()

static void dptx_link_train_clock_recovery_delay ( const u8 dpcd[DP_RECEIVER_CAP_SIZE] )

static

Definition at line 263 of file dptx.c.

References BIOS_ERR, DP_DPCD_REV, DP_DPCD_REV_14, DP_TRAINING_AUX_RD_INTERVAL, DP_TRAINING_AUX_RD_MASK, mdelay(), and printk.

Referenced by dptx_train_tps1().

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◆ dptx_set_color_depth()

static void dptx_set_color_depth	(	struct mtk_dp *	mtk_dp,
		u8	color_depth
	)

static

Definition at line 1081 of file dptx.c.

References dptx_hal_set_color_depth().

Referenced by dptx_video_config().

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◆ dptx_set_color_format()

static void dptx_set_color_format	(	struct mtk_dp *	mtk_dp,
		u8	color_format
	)

static

Definition at line 1076 of file dptx.c.

References misc_t::color_format, and dptx_hal_set_color_format().

Referenced by dptx_video_config().

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◆ dptx_set_dptxout()

static void dptx_set_dptxout ( struct mtk_dp * mtk_dp )

static

Definition at line 516 of file dptx.c.

References dptx_hal_bypassmsa_en(), and dptx_set_tu().

Referenced by dptx_video_enable().

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◆ dptx_set_misc()

static void dptx_set_misc ( struct mtk_dp * mtk_dp )

static

Definition at line 474 of file dptx.c.

References misc_t::cmisc, misc_t::color_depth, misc_t::color_format, dptx_info::depth, DP_COLOR_FORMAT_RAW, DP_COLOR_FORMAT_RGB_444, DP_COLOR_FORMAT_YONLY, DP_COLOR_FORMAT_YUV_420, DP_COLOR_FORMAT_YUV_422, DP_COLOR_FORMAT_YUV_444, misc_t::dp_misc, dptx_hal_setmisc(), dptx_info::format, mtk_dp::info, and misc_t::spec_def2.

Referenced by dptx_video_config().

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◆ dptx_set_trainingstart()

static int dptx_set_trainingstart ( struct mtk_dp * mtk_dp )

static

Definition at line 951 of file dptx.c.

References BIOS_INFO, buffer, dptx_training_info::cr_done, DP_AUX_NATIVE_READ, DP_AUX_NATIVE_WRITE, DP_LANECOUNT_1, DP_LANECOUNT_2, DP_LANECOUNT_4, DP_LINKRATE_HBR, DP_LINKRATE_HBR2, DP_LINKRATE_HBR25, DP_LINKRATE_HBR3, DP_LINKRATE_RBR, DPCD_00200, DPCD_00600, DPCD_02002, dptx_auxread_dpcd(), dptx_auxwrite_dpcd(), DPTX_PASS, dptx_training_changemode(), dptx_trainingflow(), DPTX_TRANING_FAIL, dptx_training_info::eq_done, dptx_training_info::linklane_count, dptx_training_info::linkrate, MAX_LANECOUNT, printk, mtk_dp::rx_cap, dptx_training_info::sink_count_num, dptx_training_info::sink_extcap_en, dptx_training_info::sys_max_linkrate, and mtk_dp::train_info.

Referenced by mtk_edp_init().

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◆ dptx_set_tu()

static void dptx_set_tu ( struct mtk_dp * mtk_dp )

static

Definition at line 444 of file dptx.c.

References BIOS_DEBUG, dptx_hal_get_colorbpp(), dptx_hal_settu_setencoder(), dptx_hal_settu_sramrd_start(), dptx_setsdp_downcnt_init(), dptx_setsdp_downcnt_init_inhblanking(), DPTX_TBC_BUF_READSTARTADRTHRD, mtk_dp::edid, edid_mode::ha, dptx_training_info::linklane_count, dptx_training_info::linkrate, MIN, edid::mode, edid_mode::pixel_clock, printk, and mtk_dp::train_info.

Referenced by dptx_set_dptxout().

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◆ dptx_setsdp_downcnt_init()

static void dptx_setsdp_downcnt_init	(	struct mtk_dp *	mtk_dp,
		u16	sram_read_start
	)

static

Definition at line 381 of file dptx.c.

References BIOS_DEBUG, count, DP_LANECOUNT_1, DP_LANECOUNT_2, DP_LANECOUNT_4, dptx_check_res_sample_rate(), dptx_hal_setsdp_downcnt_init(), mtk_dp::edid, dptx_training_info::linklane_count, dptx_training_info::linkrate, edid::mode, offset, edid_mode::pixel_clock, printk, and mtk_dp::train_info.

Referenced by dptx_set_tu().

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◆ dptx_setsdp_downcnt_init_inhblanking()

static void dptx_setsdp_downcnt_init_inhblanking ( struct mtk_dp * mtk_dp )

static

Definition at line 413 of file dptx.c.

References BIOS_ERR, count, DP_LANECOUNT_1, DP_LANECOUNT_2, DP_LANECOUNT_4, dptx_check_res_sample_rate(), dptx_hal_setsdp_downcnt_init_inhblanking(), mtk_dp::edid, dptx_training_info::linklane_count, dptx_training_info::linkrate, edid::mode, offset, edid_mode::pixel_clock, printk, and mtk_dp::train_info.

Referenced by dptx_set_tu().

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◆ dptx_train_tps1()

static int dptx_train_tps1	(	struct mtk_dp *	mtk_dp,
		u8	target_lanecount,
		int *	status_ctrl,
		int *	iteration,
		u8 *	dpcp_buffer,
		u8 *	dpcd206
	)

static

Definition at line 630 of file dptx.c.

References BIOS_INFO, BIT, dptx_training_info::cr_done, DP_AUX_NATIVE_READ, DP_AUX_NATIVE_WRITE, DPCD_00102, DPCD_00103, DPCD_00202, DPCD_00206, DPCD_0200C, dptx_auxread_dpcd(), dptx_auxwrite_dpcd(), dptx_clock_recovery_ok(), dptx_hal_set_txtrainingpattern(), dptx_hal_setscramble(), dptx_link_train_clock_recovery_delay(), dptx_training_checkswingpre(), printk, mtk_dp::rx_cap, dptx_training_info::sink_extcap_en, mtk_dp::train_info, TRAIN_STEP_FAIL_BREAK, TRAIN_STEP_FAIL_NOT_BREAK, and TRAIN_STEP_SUCCESS.

Referenced by dptx_trainingflow().

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◆ dptx_train_tps2_3()

static int dptx_train_tps2_3	(	struct mtk_dp *	mtk_dp,
		u8	target_lanecount,
		int *	status_ctrl,
		int *	iteration,
		u8 *	dpcp_buffer,
		u8 *	dpcd206
	)

static

Definition at line 693 of file dptx.c.

References BIOS_INFO, BIT, dptx_training_info::cr_done, DP_AUX_NATIVE_READ, DP_AUX_NATIVE_WRITE, DPCD_00102, DPCD_00103, DPCD_00202, DPCD_00206, DPCD_0200C, dptx_auxread_dpcd(), dptx_auxwrite_dpcd(), dptx_channel_eq_ok(), dptx_clock_recovery_ok(), dptx_hal_set_txtrainingpattern(), dptx_link_train_channel_eq_delay(), dptx_training_checkswingpre(), dptx_training_info::eq_done, printk, mtk_dp::rx_cap, dptx_training_info::sink_extcap_en, dptx_training_info::tps3, dptx_training_info::tps4, mtk_dp::train_info, TRAIN_STEP_FAIL_BREAK, TRAIN_STEP_FAIL_NOT_BREAK, and TRAIN_STEP_SUCCESS.

Referenced by dptx_trainingflow().

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◆ dptx_training_changemode()

static void dptx_training_changemode ( struct mtk_dp * mtk_dp )

static

Definition at line 942 of file dptx.c.

References dptx_hal_phyd_reset(), dptx_hal_reset_swing_preemphasis(), dptx_hal_ssc_en(), mdelay(), dptx_training_info::sink_ssc_en, and mtk_dp::train_info.

Referenced by dptx_set_trainingstart().

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◆ dptx_training_checkswingpre()

static bool dptx_training_checkswingpre	(	struct mtk_dp *	mtk_dp,
		u8	target_lane_count,
		const u8 *	dpcp202_x,
		u8 *	dpcp_buf
	)

static

Definition at line 522 of file dptx.c.

References BIT, dptx_hal_setswing_preemphasis(), DPTX_LANE0, DPTX_LANE1, DPTX_LANE2, DPTX_LANE3, DPTX_PREEMPHASIS3, DPTX_SWING3, and mdelay().

Referenced by dptx_train_tps1(), dptx_train_tps2_3(), and dptx_trainingflow().

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◆ dptx_trainingflow()

static int dptx_trainingflow	(	struct mtk_dp *	mtk_dp,
		u8	lanerate,
		u8	lanecount
	)

static

Definition at line 770 of file dptx.c.

References BIOS_ERR, BIOS_INFO, DP_AUX_NATIVE_READ, DP_AUX_NATIVE_WRITE, DPCD_00100, DPCD_00101, DPCD_00102, DPCD_00107, DPCD_00600, DPTX_AUX_SET_ENAHNCED_FRAME, dptx_auxread_dpcd(), dptx_auxwrite_dpcd(), dptx_hal_set_ef_mode(), dptx_hal_set_txlane(), dptx_hal_set_txrate(), dptx_hal_set_txtrainingpattern(), dptx_hal_setscramble(), DPTX_PASS, DPTX_TRAIN_MAX_ITERATION, DPTX_TRAIN_RETRY_LIMIT, dptx_train_tps1(), dptx_train_tps2_3(), dptx_training_checkswingpre(), DPTX_TRANING_FAIL, ENABLE_DPTX_EF_MODE, dptx_training_info::linklane_count, dptx_training_info::linkrate, mdelay(), memset(), printk, dptx_training_info::sink_ssc_en, mtk_dp::train_info, TRAIN_STEP_FAIL_BREAK, and TRAIN_STEP_SUCCESS.

Referenced by dptx_set_trainingstart().

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◆ dptx_video_config()

static void dptx_video_config ( struct mtk_dp * mtk_dp )

static

Definition at line 1086 of file dptx.c.

References dptx_info::depth, dptx_hal_overwrite_mn(), dptx_hal_set_msa(), dptx_set_color_depth(), dptx_set_color_format(), dptx_set_misc(), dptx_info::format, and mtk_dp::info.

Referenced by mtk_edp_init().

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◆ dptx_video_enable()

static void dptx_video_enable	(	struct mtk_dp *	mtk_dp,
		bool	enable
	)

static

Definition at line 1063 of file dptx.c.

References BIOS_INFO, dptx_hal_verify_clock(), dptx_set_dptxout(), dptx_videomute(), and printk.

Referenced by mtk_edp_init().

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◆ dptx_videomute()

static void dptx_videomute	(	struct mtk_dp *	mtk_dp,
		bool	enable
	)

static

Definition at line 318 of file dptx.c.

References dptx_hal_videomute().

Referenced by dptx_video_enable().

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◆ mtk_edp_init()

int mtk_edp_init ( struct edid * edid )

Definition at line 1100 of file dptx.c.

References BIOS_ERR, dp_intf_config(), dptx_check_sinkcap(), dptx_get_edid(), dptx_hal_hpd_high(), dptx_init_port(), dptx_init_variable(), dptx_set_trainingstart(), dptx_video_config(), dptx_video_enable(), and printk.

Referenced by configure_display().

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Macros

Enumerations

Functions

Macro Definition Documentation

◆ DP_AUX_MAX_PAYLOAD_BYTES

◆ DP_BRANCH_OUI_HEADER_SIZE

◆ DP_CHANNEL_EQ_BITS

◆ DP_DOWNSTREAM_PORT_STATUS_CHANGED

◆ DP_DPCD_REV

◆ DP_DPCD_REV_10

◆ DP_DPCD_REV_11

◆ DP_DPCD_REV_12

◆ DP_DPCD_REV_13

◆ DP_DPCD_REV_14

◆ DP_DSC_RECEIVER_CAP_SIZE

◆ DP_EDP_11

◆ DP_EDP_12

◆ DP_EDP_13

◆ DP_EDP_14

◆ DP_EDP_14a

◆ DP_EDP_14b

◆ DP_EDP_DPCD_REV

◆ DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT

◆ DP_INTERLANE_ALIGN_DONE

◆ DP_LANE0_1_STATUS

◆ DP_LANE2_3_STATUS

◆ DP_LANE_ALIGN_STATUS_UPDATED

◆ DP_LANE_CHANNEL_EQ_DONE

◆ DP_LANE_CR_DONE

◆ DP_LANE_SYMBOL_LOCKED

◆ DP_LINK_CONSTANT_N_VALUE

◆ DP_LINK_STATUS_SIZE

◆ DP_LINK_STATUS_UPDATED

◆ DP_LTTPR_COMMON_CAP_SIZE

◆ DP_LTTPR_PHY_CAP_SIZE

◆ DP_RECEIVE_PORT_0_STATUS

◆ DP_RECEIVE_PORT_1_STATUS

◆ DP_RECEIVER_CAP_SIZE

◆ DP_SINK_STATUS

◆ DP_STREAM_REGENERATION_STATUS

◆ DP_TRAINING_AUX_RD_INTERVAL

◆ DP_TRAINING_AUX_RD_MASK

◆ DPTX_TRAIN_MAX_ITERATION

◆ DPTX_TRAIN_RETRY_LIMIT

◆ EDP_DISPLAY_CTL_CAP_SIZE

◆ EDP_PSR_RECEIVER_CAP_SIZE

◆ HPD_CONNECT

◆ HPD_DISCONNECT

◆ HPD_INITIAL_STATE

◆ HPD_INT_EVNET

◆ MAX_LANECOUNT

◆ ONE_BLOCK_SIZE

Enumeration Type Documentation

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

Function Documentation

◆ dptx_auxread_bytes()

◆ dptx_auxread_dpcd()

◆ dptx_auxwrite_bytes()

◆ dptx_auxwrite_dpcd()

◆ dptx_channel_eq_ok()

◆ dptx_check_res_sample_rate()

◆ dptx_check_sinkcap()

◆ dptx_clock_recovery_ok()

◆ dptx_fec_ready()

◆ dptx_get_edid()

◆ dptx_get_lane_status()

◆ dptx_init_port()

◆ dptx_init_variable()

◆ dptx_link_status()

◆ dptx_link_train_channel_eq_delay()

◆ dptx_link_train_clock_recovery_delay()

◆ dptx_set_color_depth()