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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <stdint.h>
#include <cf9_reset.h>
#include <arch/romstage.h>
#include <northbridge/intel/i945/i945.h>
#include <northbridge/intel/i945/raminit.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <southbridge/intel/common/pmclib.h>
Go to the source code of this file.
Functions | |
__weak void | mainboard_lpc_decode (void) |
__weak void | mainboard_pre_raminit_config (int s3_resume) |
__weak void | mainboard_get_spd_map (u8 spd_map[4]) |
void | mainboard_romstage_entry (void) |
Definition at line 19 of file romstage.c.
Definition at line 11 of file romstage.c.
Referenced by mainboard_romstage_entry().
Definition at line 15 of file romstage.c.
Referenced by mainboard_romstage_entry().
Definition at line 27 of file romstage.c.
References BOOT_PATH_NORMAL, BOOT_PATH_RESUME, CONFIG, dump_spd_registers, fixup_i945gm_errata(), i82801gx_early_init(), i945_early_initialization(), i945_late_initialization(), mainboard_get_spd_map(), mainboard_late_rcba_config(), mainboard_lpc_decode(), mainboard_pre_raminit_config(), mchbar_read16(), sdram_initialize(), southbridge_detect_s3_resume(), SSKPD, and system_reset().