display.h File Reference

Go to the source code of this file.

Macros
#define	COLOR_WHITE   0xFFFFFF
#define	COLOR_BLACK   0x000000
#define	hsync_start(mode)    (mode->xres + mode->hfront_porch)
#define	hsync_end(mode)    (mode->xres + mode->hfront_porch + mode->hsync_width)
#define	htotal(mode)
#define	vtotal(mode)
#define	FRAME_IN_MS   17

Enumerations
enum	{ TEGRA_EDID_I2C_ADDRESS = 0x50 }

Functions
void	dsi_display_startup (struct device *dev)
void	dp_display_startup (struct device *dev)
int	tegra_dc_init (struct display_controller *disp_ctrl)
int	update_display_mode (struct display_controller *disp_ctrl, struct soc_nvidia_tegra210_config *config)
void	update_window (const struct soc_nvidia_tegra210_config *config)
void	update_display_shift_clock_divider (struct display_controller *disp_ctrl, u32 shift_clock_div)
void	pass_mode_info_to_payload (struct soc_nvidia_tegra210_config *config)

Macro Definition Documentation

COLOR_BLACK

#define COLOR_BLACK   0x000000

Definition at line 7 of file display.h.

COLOR_WHITE

#define COLOR_WHITE   0xFFFFFF

Definition at line 6 of file display.h.

FRAME_IN_MS

#define FRAME_IN_MS   17

Definition at line 29 of file display.h.

hsync_end

#define hsync_end

(

mode

)

(mode->xres + mode->hfront_porch + mode->hsync_width)

Definition at line 12 of file display.h.

hsync_start

#define hsync_start

(

mode

)

(mode->xres + mode->hfront_porch)

Definition at line 9 of file display.h.

htotal

#define htotal

(

mode

)

Value:

        (mode->xres + mode->hfront_porch + \
        mode->hsync_width + mode->hback_porch)

Definition at line 15 of file display.h.

vtotal

#define vtotal

(

mode

)

Value:

        (mode->yres + mode->vfront_porch + \
        mode->vsync_width + mode->vback_porch)

Definition at line 19 of file display.h.

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
TEGRA_EDID_I2C_ADDRESS

Definition at line 23 of file display.h.

Function Documentation

dp_display_startup()

void dp_display_startup

(

struct device *

dev

)

Definition at line 1561 of file dp.c.

References ALIGN_UP, tegra_dc::base, BIOS_ERR, BIOS_INFO, BIOS_SPEW, BIOS_WARNING, device::chip_info, clock_configure_plld(), clock_configure_source, config, tegra_dc::config, dc_data, dp_enable(), dp_init(), KHz, MiB, NULL, NV_PWM_CSR_ENABLE_SHIFT, NV_PWM_CSR_PULSE_WIDTH_SHIFT, tegra_dc::out, pass_mode_info_to_payload(), PLLD, printk, tegra_dc_init(), TEGRA_PWM_BASE, update_display_mode(), update_window(), and WRITEL().

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dsi_display_startup()

void dsi_display_startup

(

struct device *

dev

)

Definition at line 952 of file dsi.c.

References ALIGN_UP, BIOS_ERR, BIOS_INFO, device::chip_info, clock_configure_plld(), clock_configure_source, config, dsi_enable(), KHz, MiB, NULL, pass_mode_info_to_payload(), PLLD_OUT0, printk, tegra_dc_init(), update_display_mode(), and update_window().

Referenced by display_startup().

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pass_mode_info_to_payload()

void pass_mode_info_to_payload

(

struct soc_nvidia_tegra210_config *

config

)

Definition at line 212 of file dc.c.

References ALIGN_UP, config, DIV_ROUND_UP, and fb_add_framebuffer_info().

Referenced by dp_display_startup(), and dsi_display_startup().

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tegra_dc_init()

int tegra_dc_init

(

struct display_controller *

disp_ctrl

)

Definition at line 173 of file dc.c.

References dc_winbuf_reg::addr_h_offset, dc_winbuf_reg::addr_v_offset, dc_win_reg::blend_alpha_1bit, dc_win_reg::blend_layer_ctrl, dc_win_reg::blend_match_select, dc_win_reg::blend_nomatch_select, dc_win_reg::buffer_ctrl, dc_win_reg::byte_swap, display_controller::cmd, display_controller::com, dc_com_reg::crc_checksum, dc_win_reg::dda_increment, display_controller::disp, dc_disp_reg::disp_signal_opt0, dc_cmd_reg::disp_win_header, dc_win_reg::dv_ctrl, dc_win_reg::h_initial_dda, dc_cmd_reg::int_mask, dc_com_reg::pin_output_enb, dc_win_reg::pos, READ_MUX_ASSEMBLY, dc_winbuf_reg::start_addr_hi, dc_cmd_reg::state_access, dc_win_reg::v_initial_dda, display_controller::win, dc_win_reg::win_opt, display_controller::winbuf, WINDOW_A_SELECT, WRITE_MUX_ASSEMBLY, and WRITEL().

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update_display_mode()

int update_display_mode	(	struct display_controller *	disp_ctrl,
		struct soc_nvidia_tegra210_config *	config
	)

Definition at line 66 of file dc.c.

References dc_disp_reg::back_porch, BIOS_ERR, config, display_controller::disp, dc_disp_reg::disp_active, dc_disp_reg::disp_color_ctrl, dc_disp_reg::disp_timing_opt, dc_disp_reg::disp_win_opt, dc_disp_reg::front_porch, print_mode(), printk, dc_disp_reg::ref_to_sync, SHIFT_CLK_DIVIDER, dc_disp_reg::sync_width, update_display_shift_clock_divider(), and WRITEL().

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update_display_shift_clock_divider()

void update_display_shift_clock_divider	(	struct display_controller *	disp_ctrl,
		u32	shift_clock_div
	)

Definition at line 113 of file dc.c.

References BIOS_DEBUG, display_controller::disp, dc_disp_reg::disp_clk_ctrl, PIXEL_CLK_DIVIDER_PCD1, PIXEL_CLK_DIVIDER_SHIFT, printk, SHIFT_CLK_DIVIDER_SHIFT, and WRITEL().

Referenced by tegra_output_dsi_setup_clock(), and update_display_mode().

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update_window()

void update_window

(

const struct soc_nvidia_tegra210_config *

config

)

Definition at line 130 of file dc.c.

References ALIGN_UP, dc_disp_reg::blend_background_color, dc_win_reg::buffer_addr_mode, display_controller::cmd, COLOR_BLACK, dc_win_reg::color_depth, config, DDA_INC, dc_win_reg::dda_increment, display_controller::disp, dc_cmd_reg::disp_cmd, DISP_CTRL_MODE_C_DISPLAY, dc_cmd_reg::disp_pow_ctrl, dc_cmd_reg::disp_win_header, GENERAL_ACT_REQ, GENERAL_UPDATE, dc_win_reg::line_stride, PM0_ENABLE, PM1_ENABLE, dc_win_reg::prescaled_size, PW0_ENABLE, PW1_ENABLE, PW2_ENABLE, PW3_ENABLE, PW4_ENABLE, dc_win_reg::size, dc_cmd_reg::state_access, dc_cmd_reg::state_ctrl, val, display_controller::win, WIN_A_ACT_REQ, WIN_A_UPDATE, WINDOW_A_SELECT, WRITE_MUX_ACTIVE, and WRITEL().

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