coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early_init.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bootblock_common.h>
8 
9 #define SUPERIO_GPIO PNP_DEV(0x2e, IT8728F_GPIO)
10 #define SERIAL_DEV PNP_DEV(0x2e, 0x01)
11 
13  { 1, 0, 0 },
14  { 1, 0, 0 },
15  { 1, 0, 1 },
16  { 1, 0, 1 },
17  { 1, 0, 2 },
18  { 1, 0, 2 },
19  { 1, 0, 3 },
20  { 1, 0, 3 },
21  { 1, 0, 4 },
22  { 1, 0, 4 },
23  { 1, 0, 6 },
24  { 1, 0, 5 },
25  { 1, 0, 5 },
26  { 1, 0, 6 },
27 };
28 
30 {
31  if (!CONFIG(NO_UART_ON_SUPERIO)) {
32  /* Enable serial port */
33  ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
34  }
35 
36  /* Disable SIO WDT which kicks in DualBIOS */
37  ite_reg_write(SUPERIO_GPIO, 0xEF, 0x7E);
38 }
39 
40 void mainboard_get_spd(spd_raw_data *spd, bool id_only)
41 {
42  read_spd(&spd[0], 0x50, id_only);
43  read_spd(&spd[2], 0x52, id_only);
44 }
@ CONFIG
Definition: dsi_common.h:201
u8 spd_raw_data[256]
Definition: ddr3.h:156
void ite_enable_serial(pnp_devfn_t dev, u16 iobase)
Definition: early_serial.c:61
void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value)
Definition: early_serial.c:41
void bootblock_mainboard_early_init(void)
Definition: early_init.c:11
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
Definition: early_init.c:25
const struct southbridge_usb_port mainboard_usb_ports[]
Definition: early_init.c:8
#define SUPERIO_GPIO
Definition: early_init.c:9
#define SERIAL_DEV
Definition: early_init.c:10
void read_spd(spd_raw_data *spd, u8 addr, bool id_only)
Definition: raminit.c:138