coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
systemagent.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <delay.h>
5 #include <device/pci.h>
6 #include <device/pci_ops.h>
9 #include <soc/iomap.h>
10 #include <soc/soc_chip.h>
11 #include <soc/systemagent.h>
12 
13 /*
14  * SoC implementation
15  *
16  * Add all known fixed memory ranges for Host Controller/Memory
17  * controller.
18  */
19 void soc_add_fixed_mmio_resources(struct device *dev, int *index)
20 {
21  static const struct sa_mmio_descriptor soc_fixed_resources[] = {
22  { PCIEXBAR, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH,
23  "PCIEXBAR" },
24  { MCHBAR, MCH_BASE_ADDRESS, MCH_BASE_SIZE, "MCHBAR" },
25  { DMIBAR, DMI_BASE_ADDRESS, DMI_BASE_SIZE, "DMIBAR" },
26  { EPBAR, EP_BASE_ADDRESS, EP_BASE_SIZE, "EPBAR" },
27  { REGBAR, REG_BASE_ADDRESS, REG_BASE_SIZE, "REGBAR" },
29  };
30 
31  sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
32  ARRAY_SIZE(soc_fixed_resources));
33 
34  /* Add Vt-d resources if VT-d is enabled */
36  return;
37 
40 }
41 
42 /*
43  * SoC implementation
44  *
45  * Perform System Agent Initialization during Ramstage phase.
46  */
47 void soc_systemagent_init(struct device *dev)
48 {
49  struct soc_power_limits_config *soc_config;
51 
52  /* Enable Power Aware Interrupt Routing */
54 
55  /* Enable BIOS Reset CPL */
57 
58  mdelay(1);
60  soc_config = &config->power_limits_config;
62 }
#define REGBAR
Definition: systemagent.h:25
static const struct sa_mmio_descriptor soc_vtd_resources[]
Definition: systemagent.h:41
void soc_add_fixed_mmio_resources(struct device *dev, int *index)
Definition: systemagent.c:25
void soc_systemagent_init(struct device *dev)
Definition: systemagent.c:53
#define ARRAY_SIZE(a)
Definition: helpers.h:12
void enable_bios_reset_cpl(void)
void enable_power_aware_intr(void)
Definition: systemagent.c:298
void sa_add_fixed_mmio_resources(struct device *dev, int *resource_cnt, const struct sa_mmio_descriptor *sa_fixed_resources, size_t count)
Definition: systemagent.c:87
void set_power_limits(u8 power_limit_1_time)
Definition: haswell_init.c:313
void mdelay(unsigned int msecs)
Definition: delay.c:2
#define CAPID0_A
Definition: host_bridge.h:65
#define MCHBAR
Definition: host_bridge.h:7
#define PCIEXBAR
Definition: host_bridge.h:32
#define VTD_DISABLE
Definition: host_bridge.h:67
#define DMIBAR
Definition: host_bridge.h:33
#define EPBAR
Definition: host_bridge.h:6
#define EDRAMBAR
Definition: mchbar.h:19
#define config_of_soc()
Definition: device.h:394
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
Definition: pci_ops.h:58
#define REG_BASE_ADDRESS
Definition: iomap.h:67
#define REG_BASE_SIZE
Definition: iomap.h:68
#define DMI_BASE_ADDRESS
Definition: iomap.h:37
#define EP_BASE_ADDRESS
Definition: iomap.h:40
#define MCH_BASE_ADDRESS
Definition: iomap.h:82
enum board_config config
Definition: memory.c:448
#define DMI_BASE_SIZE
Definition: memmap.h:8
#define EP_BASE_SIZE
Definition: memmap.h:10
#define EDRAM_BASE_ADDRESS
Definition: memmap.h:12
#define MCH_BASE_SIZE
Definition: memmap.h:6
#define EDRAM_BASE_SIZE
Definition: memmap.h:13
#define MOBILE_SKU_PL1_TIME_SEC
Definition: power_limit.h:16
Definition: device.h:107
unsigned int index
Definition: systemagent.h:45