coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mtrr.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <cpu/x86/msr.h>
4 #include <cpu/x86/mtrr.h>
5 #include <soc/pci_devs.h>
6 #include <soc/reg_access.h>
7 
8 asmlinkage void *soc_set_mtrrs(void *top_of_stack)
9 {
10  union {
11  uint32_t u32[2];
12  uint64_t u64;
13  msr_t msr;
14  } data;
15  uint32_t mtrr_count;
16  uint32_t *mtrr_data;
17  uint32_t mtrr_reg;
18 
19  /*
20  * The stack contents are initialized in src/soc/intel/common/stack.c
21  * to be the following:
22  *
23  * *
24  * *
25  * *
26  * +36: MTRR mask 1 63:32
27  * +32: MTRR mask 1 31:0
28  * +28: MTRR base 1 63:32
29  * +24: MTRR base 1 31:0
30  * +20: MTRR mask 0 63:32
31  * +16: MTRR mask 0 31:0
32  * +12: MTRR base 0 63:32
33  * +8: MTRR base 0 31:0
34  * +4: Number of MTRRs to setup (described above)
35  * top_of_stack --> +0: Number of variable MTRRs to clear
36  *
37  * This routine:
38  * * Clears all of the variable MTRRs
39  * * Initializes the variable MTRRs with the data passed in
40  * * Returns the new top of stack after removing all of the
41  * data passed in.
42  */
43 
44  /* Clear all of the variable MTRRs (base and mask). */
45  mtrr_reg = MTRR_PHYS_BASE(0);
46  mtrr_data = top_of_stack;
47  mtrr_count = (*mtrr_data++) * 2;
48  data.u64 = 0;
49  while (mtrr_count-- > 0)
50  soc_msr_write(mtrr_reg++, data.msr);
51 
52  /* Setup the specified variable MTRRs */
53  mtrr_reg = MTRR_PHYS_BASE(0);
54  mtrr_count = *mtrr_data++;
55  while (mtrr_count-- > 0) {
56  data.u32[0] = *mtrr_data++;
57  data.u32[1] = *mtrr_data++;
58  soc_msr_write(mtrr_reg++, data.msr); /* Base */
59  data.u32[0] = *mtrr_data++;
60  data.u32[1] = *mtrr_data++;
61  soc_msr_write(mtrr_reg++, data.msr); /* Mask */
62  }
63 
64  /* Remove setup_stack_and_mtrrs data and return the new top_of_stack */
65  top_of_stack = mtrr_data;
66  return top_of_stack;
67 }
68 
70 {
71  union {
72  uint32_t u32[2];
73  uint64_t u64;
74  msr_t msr;
75  } data;
76 
77  /* Enable MTRR. */
78  data.msr = soc_msr_read(MTRR_DEF_TYPE_MSR);
79  data.u32[0] |= MTRR_DEF_TYPE_EN;
81 }
#define asmlinkage
Definition: cpu.h:8
msr_t soc_msr_read(unsigned int index)
Definition: reg_access.c:430
void soc_msr_write(unsigned int index, msr_t msr)
Definition: reg_access.c:452
asmlinkage void * soc_set_mtrrs(void *top_of_stack)
Definition: mtrr.c:8
asmlinkage void soc_enable_mtrrs(void)
Definition: mtrr.c:69
uint64_t u64
Definition: stdint.h:54
unsigned int uint32_t
Definition: stdint.h:14
uint32_t u32
Definition: stdint.h:51
unsigned long long uint64_t
Definition: stdint.h:17
#define MTRR_PHYS_BASE(reg)
Definition: mtrr.h:39
#define MTRR_DEF_TYPE_EN
Definition: mtrr.h:27
#define MTRR_DEF_TYPE_MSR
Definition: mtrr.h:25