coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <acpi/acpi.h>
4 #include <console/console.h>
5 #include <cpu/x86/smm.h>
6 #include <soc/nvs.h>
11 #include <elog.h>
12 
13 /* Include EC functions */
14 #include <ec/google/chromeec/ec.h>
15 #include "ec.h"
16 
17 static u8 mainboard_smi_ec(void)
18 {
20 
21  /* Log this event */
22  if (cmd)
24 
25  switch (cmd) {
27  printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
28 
29  /* Go to S5 */
31  break;
32  }
33 
34  return cmd;
35 }
36 
37 void mainboard_smi_gpi(u32 gpi_sts)
38 {
39  if (gpi_sts & (1 << EC_SMI_GPI)) {
40  /* Process all pending events */
41  while (mainboard_smi_ec() != 0);
42  }
43 }
44 
45 void mainboard_smi_sleep(u8 slp_typ)
46 {
47  /* Disable USB charging if required */
48  switch (slp_typ) {
49  case ACPI_S3:
50  if (gnvs->s3u0 == 0)
53  if (gnvs->s3u1 == 0)
56  break;
57  case ACPI_S5:
58  if (gnvs->s5u0 == 0)
61  if (gnvs->s5u1 == 0)
64  break;
65  }
66 
67  /* Disable SCI and SMI events */
70 
71  /* Clear pending events that may trigger immediate wake */
73  ;
74 
75  /* Enable wake events */
77 }
78 
80 {
81  switch (apmc) {
84  /* Clear all pending events */
86  ;
88  break;
91  /* Clear all pending events */
93  ;
95  break;
96  }
97  return 0;
98 }
#define PM1_CNT
Definition: pm.h:27
#define ELOG_TYPE_EC_EVENT
Definition: elog.h:90
#define printk(level,...)
Definition: stdlib.h:16
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
void __weak mainboard_smi_gpi(u32 gpi_sts)
Definition: smihandler.c:208
int google_chromeec_set_wake_mask(uint64_t mask)
Definition: ec.c:1131
int google_chromeec_set_smi_mask(uint64_t mask)
Definition: ec.c:1125
int google_chromeec_set_usb_charge_mode(uint8_t port_id, enum usb_charge_mode mode)
Definition: ec.c:1143
int google_chromeec_set_sci_mask(uint64_t mask)
Definition: ec.c:1119
enum host_event_code google_chromeec_get_event(void)
Definition: ec_i2c.c:242
@ EC_HOST_EVENT_NONE
Definition: ec_commands.h:654
@ EC_HOST_EVENT_LID_CLOSED
Definition: ec_commands.h:655
@ USB_CHARGE_MODE_DISABLED
Definition: ec_commands.h:3240
@ ACPI_S5
Definition: acpi.h:1385
@ ACPI_S3
Definition: acpi.h:1383
#define APM_CNT_ACPI_DISABLE
Definition: smm.h:21
#define APM_CNT_ACPI_ENABLE
Definition: smm.h:22
static int elog_gsmi_add_event_byte(u8 event_type, u8 data)
Definition: elog.h:46
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define EC_SMI_GPI
Definition: ec.h:10
u32 read_pmbase32(const u8 addr)
Definition: pmbase.c:57
void write_pmbase32(const u8 addr, const u32 val)
Definition: pmbase.c:36
struct global_nvs * gnvs
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45
u8 s5u1
Definition: nvs.h:33
u8 s3u0
Definition: nvs.h:34
u8 s3u1
Definition: nvs.h:35
u8 s5u0
Definition: nvs.h:32