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Macros | Enumerations | Functions
dptx_hal.h File Reference
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Macros

#define AUX_CMD_I2C_R_MOT0   0x1
 
#define AUX_CMD_I2C_R   0x5
 
#define AUX_CMD_NATIVE_R   0x9
 
#define AUX_WAITREPLY_LPNUM   20000
 
#define DP_AUX_I2C_WRITE   0x0
 
#define DP_AUX_I2C_READ   0x1
 
#define DP_AUX_I2C_WRITE_STATUS_UPDATE   0x2
 
#define DP_AUX_I2C_MOT   0x4
 
#define DP_AUX_NATIVE_WRITE   0x8
 
#define DP_AUX_NATIVE_READ   0x9
 
#define DP_WRITE1BYTE(mtk_dp, reg, u8_val)    mtk_dp_write_byte(mtk_dp, reg, u8_val, 0xff)
 
#define DP_WRITE2BYTE(mtk_dp, reg, u16_val)    mtk_dp_mask(mtk_dp, reg, u16_val, 0xffff)
 

Enumerations

enum  {
  DPTX_LANE0 = 0x0 , DPTX_LANE1 = 0x1 , DPTX_LANE2 = 0x2 , DPTX_LANE3 = 0x3 ,
  DPTX_LANE_MAX
}
 
enum  {
  DP_LINKRATE_RBR = 0x6 , DP_LINKRATE_HBR = 0xa , DP_LINKRATE_HBR2 = 0x14 , DP_LINKRATE_HBR25 = 0x19 ,
  DP_LINKRATE_HBR3 = 0x1e
}
 
enum  {
  DP_COLOR_FORMAT_RGB_444 = 0 , DP_COLOR_FORMAT_YUV_422 = 1 , DP_COLOR_FORMAT_YUV_444 = 2 , DP_COLOR_FORMAT_YUV_420 = 3 ,
  DP_COLOR_FORMAT_YONLY = 4 , DP_COLOR_FORMAT_RAW = 5 , DP_COLOR_FORMAT_RESERVED = 6 , DP_COLOR_FORMAT_DEFAULT = DP_COLOR_FORMAT_RGB_444 ,
  DP_COLOR_FORMAT_UNKNOWN = 15
}
 
enum  {
  DP_COLOR_DEPTH_6BIT = 0 , DP_COLOR_DEPTH_8BIT = 1 , DP_COLOR_DEPTH_10BIT = 2 , DP_COLOR_DEPTH_12BIT = 3 ,
  DP_COLOR_DEPTH_16BIT = 4 , DP_COLOR_DEPTH_UNKNOWN = 5
}
 

Functions

bool dptx_hal_hpd_high (struct mtk_dp *mtk_dp)
 
bool dptx_hal_auxread_bytes (struct mtk_dp *mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 *rx_buf)
 
bool dptx_hal_auxwrite_bytes (struct mtk_dp *mtk_dp, u8 cmd, u32 dpcd_addr, size_t length, u8 *data)
 
bool dptx_hal_setswing_preemphasis (struct mtk_dp *mtk_dp, int lane_num, int swing_value, int preemphasis)
 
u8 dptx_hal_get_colorbpp (struct mtk_dp *mtk_dp)
 
u32 mtk_dp_read (struct mtk_dp *mtk_dp, u32 offset)
 
void mtk_dp_write_byte (struct mtk_dp *mtk_dp, u32 addr, u8 val, u32 mask)
 
void mtk_dp_mask (struct mtk_dp *mtk_dp, u32 offset, u32 val, u32 mask)
 
void mtk_dp_write (struct mtk_dp *mtk_dp, u32 offset, u32 val)
 
void dptx_hal_verify_clock (struct mtk_dp *mtk_dp)
 
void dptx_hal_reset_swing_preemphasis (struct mtk_dp *mtk_dp)
 
void dptx_hal_digital_swreset (struct mtk_dp *mtk_dp)
 
void dptx_hal_ssc_en (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_hpd_int_en (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_hpd_detect_setting (struct mtk_dp *mtk_dp)
 
void dptx_hal_phy_setting (struct mtk_dp *mtk_dp)
 
void dptx_hal_aux_setting (struct mtk_dp *mtk_dp)
 
void dptx_hal_digital_setting (struct mtk_dp *mtk_dp)
 
void dptx_hal_set_txlane (struct mtk_dp *mtk_dp, int value)
 
void dptx_hal_phy_setidlepattern (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_phyd_reset (struct mtk_dp *mtk_dp)
 
void dptx_hal_set_txtrainingpattern (struct mtk_dp *mtk_dp, int value)
 
void dptx_hal_set_ef_mode (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_setscramble (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_init_setting (struct mtk_dp *mtk_dp)
 
void dptx_hal_videomute (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_bypassmsa_en (struct mtk_dp *mtk_dp, bool enable)
 
void dptx_hal_overwrite_mn (struct mtk_dp *mtk_dp, bool enable, u32 video_m, u32 video_n)
 
void dptx_hal_settu_sramrd_start (struct mtk_dp *mtk_dp, u16 value)
 
void dptx_hal_setsdp_downcnt_init_inhblanking (struct mtk_dp *mtk_dp, u16 value)
 
void dptx_hal_setsdp_downcnt_init (struct mtk_dp *mtk_dp, u16 value)
 
void dptx_hal_settu_setencoder (struct mtk_dp *mtk_dp)
 
void dptx_hal_set_msa (struct mtk_dp *mtk_dp)
 
void dptx_hal_setmisc (struct mtk_dp *mtk_dp, u8 cmisc[2])
 
void dptx_hal_set_color_depth (struct mtk_dp *mtk_dp, u8 color_depth)
 
void dptx_hal_set_color_format (struct mtk_dp *mtk_dp, u8 color_format)
 
void dptx_hal_set_txrate (struct mtk_dp *mtk_dp, int value)
 
void dptx_hal_analog_power_en (struct mtk_dp *mtk_dp, bool enable)
 

Macro Definition Documentation

◆ AUX_CMD_I2C_R

#define AUX_CMD_I2C_R   0x5

Definition at line 7 of file dptx_hal.h.

◆ AUX_CMD_I2C_R_MOT0

#define AUX_CMD_I2C_R_MOT0   0x1

Definition at line 6 of file dptx_hal.h.

◆ AUX_CMD_NATIVE_R

#define AUX_CMD_NATIVE_R   0x9

Definition at line 8 of file dptx_hal.h.

◆ AUX_WAITREPLY_LPNUM

#define AUX_WAITREPLY_LPNUM   20000

Definition at line 9 of file dptx_hal.h.

◆ DP_AUX_I2C_MOT

#define DP_AUX_I2C_MOT   0x4

Definition at line 14 of file dptx_hal.h.

◆ DP_AUX_I2C_READ

#define DP_AUX_I2C_READ   0x1

Definition at line 12 of file dptx_hal.h.

◆ DP_AUX_I2C_WRITE

#define DP_AUX_I2C_WRITE   0x0

Definition at line 11 of file dptx_hal.h.

◆ DP_AUX_I2C_WRITE_STATUS_UPDATE

#define DP_AUX_I2C_WRITE_STATUS_UPDATE   0x2

Definition at line 13 of file dptx_hal.h.

◆ DP_AUX_NATIVE_READ

#define DP_AUX_NATIVE_READ   0x9

Definition at line 16 of file dptx_hal.h.

◆ DP_AUX_NATIVE_WRITE

#define DP_AUX_NATIVE_WRITE   0x8

Definition at line 15 of file dptx_hal.h.

◆ DP_WRITE1BYTE

#define DP_WRITE1BYTE (   mtk_dp,
  reg,
  u8_val 
)     mtk_dp_write_byte(mtk_dp, reg, u8_val, 0xff)

Definition at line 18 of file dptx_hal.h.

◆ DP_WRITE2BYTE

#define DP_WRITE2BYTE (   mtk_dp,
  reg,
  u16_val 
)     mtk_dp_mask(mtk_dp, reg, u16_val, 0xffff)

Definition at line 20 of file dptx_hal.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
DPTX_LANE0 
DPTX_LANE1 
DPTX_LANE2 
DPTX_LANE3 
DPTX_LANE_MAX 

Definition at line 23 of file dptx_hal.h.

◆ anonymous enum

anonymous enum
Enumerator
DP_LINKRATE_RBR 
DP_LINKRATE_HBR 
DP_LINKRATE_HBR2 
DP_LINKRATE_HBR25 
DP_LINKRATE_HBR3 

Definition at line 31 of file dptx_hal.h.

◆ anonymous enum

anonymous enum
Enumerator
DP_COLOR_FORMAT_RGB_444 
DP_COLOR_FORMAT_YUV_422 
DP_COLOR_FORMAT_YUV_444 
DP_COLOR_FORMAT_YUV_420 
DP_COLOR_FORMAT_YONLY 
DP_COLOR_FORMAT_RAW 
DP_COLOR_FORMAT_RESERVED 
DP_COLOR_FORMAT_DEFAULT 
DP_COLOR_FORMAT_UNKNOWN 

Definition at line 39 of file dptx_hal.h.

◆ anonymous enum

anonymous enum
Enumerator
DP_COLOR_DEPTH_6BIT 
DP_COLOR_DEPTH_8BIT 
DP_COLOR_DEPTH_10BIT 
DP_COLOR_DEPTH_12BIT 
DP_COLOR_DEPTH_16BIT 
DP_COLOR_DEPTH_UNKNOWN 

Definition at line 51 of file dptx_hal.h.

Function Documentation

◆ dptx_hal_analog_power_en()

void dptx_hal_analog_power_en ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 810 of file dptx_hal.c.

References BIT, DP_TX_TOP_RESET_AND_PROBE, DP_WRITE2BYTE, mdelay(), mtk_dp_write_byte(), and TOP_OFFSET.

Referenced by dptx_init_port().

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◆ dptx_hal_aux_setting()

void dptx_hal_aux_setting ( struct mtk_dp *  mtk_dp)

Definition at line 657 of file dptx_hal.c.

References AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK, BIT, DP_WRITE1BYTE, GENMASK, MTK_ATOP_EN_AUX_TX_P0_FLDMASK, MTK_ATOP_EN_AUX_TX_P0_FLDMASK_POS, mtk_dp_mask(), mtk_dp_write_byte(), REG_360C_AUX_TX_P0, REG_3614_AUX_TX_P0, REG_3634_AUX_TX_P0, REG_3658_AUX_TX_P0, and REG_37C8_AUX_TX_P0.

Referenced by dptx_init_port().

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◆ dptx_hal_auxread_bytes()

bool dptx_hal_auxread_bytes ( struct mtk_dp *  mtk_dp,
u8  cmd,
u32  dpcd_addr,
size_t  length,
u8 *  rx_buf 
)

Definition at line 353 of file dptx_hal.c.

References AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK, AUX_CMD_I2C_R, AUX_CMD_I2C_R_MOT0, AUX_CMD_NATIVE_R, AUX_NO_LENGTH_AUX_TX_P0_FLDMASK, AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_POS, AUX_RD_MODE_AUX_TX_P0_FLDMASK, AUX_RD_MODE_AUX_TX_P0_FLDMASK_POS, AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK, AUX_RX_FIFO_R_PULSE_TX_P0_FLDMASK_POS, AUX_RX_FIFO_READ_PULSE_TX_P0_FLDMASK, AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK, AUX_RX_RECV_COMPLETE_IRQ_TX_P0_FLDMASK, AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK, AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_POS, AUX_WAITREPLY_LPNUM, BIOS_ERR, BIOS_INFO, DP_WRITE1BYTE, DP_WRITE2BYTE, length, MCU_ACK_TRAN_COMPLETE_AUX_TX_P0_FLDMASK_POS, MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK, MCU_REQ_DATA_NUM_AUX_TX_P0_FLDMASK_POS, MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK, mdelay(), mtk_dp_mask(), mtk_dp_read(), printk, REG_3618_AUX_TX_P0, REG_3620_AUX_TX_P0, REG_3624_AUX_TX_P0, REG_3628_AUX_TX_P0, REG_362C_AUX_TX_P0, REG_3630_AUX_TX_P0, REG_3640_AUX_TX_P0, REG_3644_AUX_TX_P0, REG_3648_AUX_TX_P0, REG_364C_AUX_TX_P0, and REG_3650_AUX_TX_P0.

Referenced by dptx_auxread_bytes().

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◆ dptx_hal_auxwrite_bytes()

bool dptx_hal_auxwrite_bytes ( struct mtk_dp *  mtk_dp,
u8  cmd,
u32  dpcd_addr,
size_t  length,
u8 *  data 
)

Definition at line 467 of file dptx_hal.c.

References AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK, AUX_RX_RECV_COMPLETE_IRQ_TX_P0_FLDMASK, AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK, AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_POS, AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK, AUX_WAITREPLY_LPNUM, BIOS_ERR, BIOS_INFO, DP_WRITE1BYTE, length, mdelay(), mtk_dp_read(), mtk_dp_write_byte(), printk, REG_3624_AUX_TX_P0, REG_3628_AUX_TX_P0, REG_362C_AUX_TX_P0, REG_3630_AUX_TX_P0, REG_3640_AUX_TX_P0, REG_3644_AUX_TX_P0, REG_3648_AUX_TX_P0, REG_364C_AUX_TX_P0, REG_3650_AUX_TX_P0, REG_3704_AUX_TX_P0, and REG_3708_AUX_TX_P0.

Referenced by dptx_auxwrite_bytes().

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◆ dptx_hal_bypassmsa_en()

void dptx_hal_bypassmsa_en ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 110 of file dptx_hal.c.

References mtk_dp_mask(), and REG_3030_DP_ENCODER0_P0.

Referenced by dptx_set_dptxout().

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◆ dptx_hal_digital_setting()

void dptx_hal_digital_setting ( struct mtk_dp *  mtk_dp)

Definition at line 674 of file dptx_hal.c.

References BIT, DP_COLOR_DEPTH_8BIT, DP_COLOR_FORMAT_RGB_444, dptx_hal_set_color_depth(), dptx_hal_set_color_format(), GENMASK, mdelay(), mtk_dp_write_byte(), REG_3004_DP_ENCODER0_P0, REG_304C_DP_ENCODER0_P0, REG_3368_DP_ENCODER1_P0, and VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK.

Referenced by dptx_init_port().

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◆ dptx_hal_digital_swreset()

void dptx_hal_digital_swreset ( struct mtk_dp *  mtk_dp)

Definition at line 693 of file dptx_hal.c.

References BIT, mdelay(), mtk_dp_write_byte(), and REG_340C_DP_TRANS_P0.

Referenced by dptx_init_port().

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◆ dptx_hal_get_colorbpp()

u8 dptx_hal_get_colorbpp ( struct mtk_dp *  mtk_dp)

Definition at line 259 of file dptx_hal.c.

References BIOS_ERR, dptx_info::depth, DP_COLOR_DEPTH_10BIT, DP_COLOR_DEPTH_12BIT, DP_COLOR_DEPTH_16BIT, DP_COLOR_DEPTH_6BIT, DP_COLOR_DEPTH_8BIT, DP_COLOR_FORMAT_YUV_420, DP_COLOR_FORMAT_YUV_422, dptx_info::format, mtk_dp::info, and printk.

Referenced by dptx_set_tu().

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◆ dptx_hal_hpd_detect_setting()

void dptx_hal_hpd_detect_setting ( struct mtk_dp *  mtk_dp)

Definition at line 597 of file dptx_hal.c.

References DP_WRITE1BYTE, GENMASK, mtk_dp_write_byte(), REG_3410_DP_TRANS_P0, and REG_3430_DP_TRANS_P0.

Referenced by dptx_init_port().

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◆ dptx_hal_hpd_high()

bool dptx_hal_hpd_high ( struct mtk_dp *  mtk_dp)

Definition at line 348 of file dptx_hal.c.

References BIT, mtk_dp_read(), and REG_3414_DP_TRANS_P0.

Referenced by mtk_edp_init().

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◆ dptx_hal_hpd_int_en()

void dptx_hal_hpd_int_en ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 590 of file dptx_hal.c.

References GENMASK, mtk_dp_write_byte(), and REG_3418_DP_TRANS_P0.

Referenced by dptx_init_port().

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◆ dptx_hal_init_setting()

void dptx_hal_init_setting ( struct mtk_dp *  mtk_dp)

Definition at line 101 of file dptx_hal.c.

References BIT, DP_TX_TOP_IRQ_MASK, DP_WRITE1BYTE, mtk_dp_mask(), REG_304C_DP_ENCODER0_P0, REG_31EC_DP_ENCODER0_P0, REG_342C_DP_TRANS_P0, and REG_3540_DP_TRANS_P0.

Referenced by dptx_init_port().

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◆ dptx_hal_overwrite_mn()

void dptx_hal_overwrite_mn ( struct mtk_dp *  mtk_dp,
bool  enable,
u32  video_m,
u32  video_n 
)

Definition at line 231 of file dptx_hal.c.

References BIT, DP_WRITE1BYTE, DP_WRITE2BYTE, mtk_dp_write_byte(), REG_3004_DP_ENCODER0_P0, REG_3008_DP_ENCODER0_P0, REG_300C_DP_ENCODER0_P0, REG_3044_DP_ENCODER0_P0, REG_3048_DP_ENCODER0_P0, REG_3050_DP_ENCODER0_P0, and REG_3054_DP_ENCODER0_P0.

Referenced by dptx_video_config().

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◆ dptx_hal_phy_setidlepattern()

void dptx_hal_phy_setidlepattern ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 763 of file dptx_hal.c.

References mtk_dp_write_byte(), and REG_3580_DP_TRANS_P0.

Referenced by dptx_hal_set_txtrainingpattern(), and dptx_init_port().

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◆ dptx_hal_phy_setting()

void dptx_hal_phy_setting ( struct mtk_dp *  mtk_dp)

Definition at line 608 of file dptx_hal.c.

References BIT, DP_PWR_STATE_FLDMASK, DP_PWR_STATE_FLDMASK_POS, DP_TX_TOP_PWR_STATE, mtk_dp_mask(), and mtk_dp_write().

Referenced by dptx_init_port().

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◆ dptx_hal_phyd_reset()

void dptx_hal_phyd_reset ( struct mtk_dp *  mtk_dp)

Definition at line 700 of file dptx_hal.c.

References BIT, mdelay(), and mtk_dp_write_byte().

Referenced by dptx_training_changemode().

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◆ dptx_hal_reset_swing_preemphasis()

void dptx_hal_reset_swing_preemphasis ( struct mtk_dp *  mtk_dp)

Definition at line 578 of file dptx_hal.c.

References DP_TX_TOP_SWING_EMP, DPTX_LANE_MAX, mask, mtk_dp_mask(), volt_preemphasis, and volt_swing.

Referenced by dptx_training_changemode().

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◆ dptx_hal_set_color_depth()

void dptx_hal_set_color_depth ( struct mtk_dp *  mtk_dp,
u8  color_depth 
)

Definition at line 196 of file dptx_hal.c.

References DP_COLOR_DEPTH_10BIT, DP_COLOR_DEPTH_12BIT, DP_COLOR_DEPTH_16BIT, DP_COLOR_DEPTH_6BIT, DP_COLOR_DEPTH_8BIT, mtk_dp_write_byte(), REG_3034_DP_ENCODER0_P0, REG_303C_DP_ENCODER0_P0, and val.

Referenced by dptx_hal_digital_setting(), and dptx_set_color_depth().

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◆ dptx_hal_set_color_format()

void dptx_hal_set_color_format ( struct mtk_dp *  mtk_dp,
u8  color_format 
)

Definition at line 171 of file dptx_hal.c.

References BIT, DP_COLOR_FORMAT_RGB_444, DP_COLOR_FORMAT_YUV_420, DP_COLOR_FORMAT_YUV_422, DP_COLOR_FORMAT_YUV_444, GENMASK, mtk_dp_write_byte(), REG_3034_DP_ENCODER0_P0, and REG_303C_DP_ENCODER0_P0.

Referenced by dptx_hal_digital_setting(), and dptx_set_color_format().

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◆ dptx_hal_set_ef_mode()

void dptx_hal_set_ef_mode ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 769 of file dptx_hal.c.

References BIT, mtk_dp_write_byte(), and REG_3000_DP_ENCODER0_P0.

Referenced by dptx_trainingflow().

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◆ dptx_hal_set_msa()

void dptx_hal_set_msa ( struct mtk_dp *  mtk_dp)

Definition at line 116 of file dptx_hal.c.

References BIOS_INFO, DP_WRITE2BYTE, mtk_dp::edid, edid_mode::ha, edid_mode::hbl, edid_mode::hborder, edid_mode::hso, HSP_SW_DP_ENCODER0_P0_FLDMASK, HSP_SW_DP_ENCODER0_P0_FLDMASK_POS, edid_mode::hspw, HSW_SW_DP_ENCODER0_P0_FLDMASK, HSW_SW_DP_ENCODER0_P0_FLDMASK_POS, htotal, edid::mode, mtk_dp_mask(), edid_mode::pixel_clock, printk, REG_3010_DP_ENCODER0_P0, REG_3014_DP_ENCODER0_P0, REG_3018_DP_ENCODER0_P0, REG_301C_DP_ENCODER0_P0, REG_3020_DP_ENCODER0_P0, REG_3024_DP_ENCODER0_P0, REG_3028_DP_ENCODER0_P0, REG_302C_DP_ENCODER0_P0, REG_3064_DP_ENCODER0_P0, REG_3154_DP_ENCODER0_P0, REG_3158_DP_ENCODER0_P0, REG_315C_DP_ENCODER0_P0, REG_3160_DP_ENCODER0_P0, REG_3164_DP_ENCODER0_P0, REG_3168_DP_ENCODER0_P0, REG_316C_DP_ENCODER0_P0, REG_3170_DP_ENCODER0_P0, REG_3174_DP_ENCODER0_P0, REG_3178_DP_ENCODER0_P0, edid_mode::va, edid_mode::vbl, edid_mode::vborder, edid_mode::vso, VSP_SW_DP_ENCODER0_P0_FLDMASK, VSP_SW_DP_ENCODER0_P0_FLDMASK_POS, edid_mode::vspw, VSW_SW_DP_ENCODER0_P0_FLDMASK, VSW_SW_DP_ENCODER0_P0_FLDMASK_POS, and vtotal.

Referenced by dptx_video_config().

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◆ dptx_hal_set_txlane()

void dptx_hal_set_txlane ( struct mtk_dp *  mtk_dp,
int  value 
)

Definition at line 707 of file dptx_hal.c.

References BIOS_ERR, BIT, mtk_dp_write_byte(), printk, REG_3000_DP_ENCODER0_P0, REG_34A4_DP_TRANS_P0, REG_35F0_DP_TRANS_P0, UINT8_MAX, and value.

Referenced by dptx_trainingflow().

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◆ dptx_hal_set_txrate()

void dptx_hal_set_txrate ( struct mtk_dp *  mtk_dp,
int  value 
)

Definition at line 726 of file dptx_hal.c.

References BIOS_ERR, DP_LINKRATE_HBR, DP_LINKRATE_HBR2, DP_LINKRATE_HBR3, DP_LINKRATE_RBR, mtk_dp_write(), printk, and value.

Referenced by dptx_trainingflow().

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◆ dptx_hal_set_txtrainingpattern()

void dptx_hal_set_txtrainingpattern ( struct mtk_dp *  mtk_dp,
int  value 
)

Definition at line 753 of file dptx_hal.c.

References BIT, dptx_hal_phy_setidlepattern(), GENMASK, mtk_dp_write_byte(), REG_3400_DP_TRANS_P0, and value.

Referenced by dptx_train_tps1(), dptx_train_tps2_3(), and dptx_trainingflow().

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◆ dptx_hal_setmisc()

void dptx_hal_setmisc ( struct mtk_dp *  mtk_dp,
u8  cmisc[2] 
)

Definition at line 225 of file dptx_hal.c.

References mtk_dp_write_byte(), and REG_3034_DP_ENCODER0_P0.

Referenced by dptx_set_misc().

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◆ dptx_hal_setscramble()

void dptx_hal_setscramble ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 783 of file dptx_hal.c.

References BIT, mtk_dp_write_byte(), and REG_3404_DP_TRANS_P0.

Referenced by dptx_train_tps1(), and dptx_trainingflow().

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◆ dptx_hal_setsdp_downcnt_init()

void dptx_hal_setsdp_downcnt_init ( struct mtk_dp *  mtk_dp,
u16  value 
)

Definition at line 330 of file dptx_hal.c.

References mtk_dp_mask(), REG_3040_DP_ENCODER0_P0, and value.

Referenced by dptx_setsdp_downcnt_init().

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◆ dptx_hal_setsdp_downcnt_init_inhblanking()

void dptx_hal_setsdp_downcnt_init_inhblanking ( struct mtk_dp *  mtk_dp,
u16  value 
)

Definition at line 324 of file dptx_hal.c.

References mtk_dp_mask(), REG_3364_DP_ENCODER1_P0, and value.

Referenced by dptx_setsdp_downcnt_init_inhblanking().

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◆ dptx_hal_setswing_preemphasis()

bool dptx_hal_setswing_preemphasis ( struct mtk_dp *  mtk_dp,
int  lane_num,
int  swing_value,
int  preemphasis 
)

Definition at line 558 of file dptx_hal.c.

References BIOS_DEBUG, BIOS_ERR, DP_TX_TOP_SWING_EMP, DPTX_LANE_MAX, mask, mtk_dp_mask(), printk, volt_preemphasis, and volt_swing.

Referenced by dptx_training_checkswingpre().

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◆ dptx_hal_settu_setencoder()

void dptx_hal_settu_setencoder ( struct mtk_dp *  mtk_dp)

Definition at line 335 of file dptx_hal.c.

References BIT, DP_WRITE2BYTE, mtk_dp_mask(), mtk_dp_write_byte(), REG_303C_DP_ENCODER0_P0, REG_3040_DP_ENCODER0_P0, REG_3300_DP_ENCODER1_P0, REG_3364_DP_ENCODER1_P0, and REG_3368_DP_ENCODER1_P0.

Referenced by dptx_set_tu().

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◆ dptx_hal_settu_sramrd_start()

void dptx_hal_settu_sramrd_start ( struct mtk_dp *  mtk_dp,
u16  value 
)

Definition at line 315 of file dptx_hal.c.

References mtk_dp_write_byte(), REG_303C_DP_ENCODER0_P0, and value.

Referenced by dptx_set_tu().

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◆ dptx_hal_ssc_en()

void dptx_hal_ssc_en ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 643 of file dptx_hal.c.

References BIT, GENMASK, mdelay(), and mtk_dp_mask().

Referenced by dptx_training_changemode().

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◆ dptx_hal_verify_clock()

void dptx_hal_verify_clock ( struct mtk_dp *  mtk_dp)

Definition at line 87 of file dptx_hal.c.

References BIOS_DEBUG, dptx_training_info::linkrate, m, mtk_dp_read(), printk, REG_33C8_DP_ENCODER1_P0, and mtk_dp::train_info.

Referenced by dptx_video_enable().

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◆ dptx_hal_videomute()

void dptx_hal_videomute ( struct mtk_dp *  mtk_dp,
bool  enable 
)

Definition at line 794 of file dptx_hal.c.

References BIOS_DEBUG, BIT, DP_TX_SECURE_REG11, mtk_dp_write_byte(), printk, read32(), REG_3000_DP_ENCODER0_P0, and mtk_dp::regs.

Referenced by dptx_videomute().

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◆ mtk_dp_mask()

void mtk_dp_mask ( struct mtk_dp *  mtk_dp,
u32  offset,
u32  val,
u32  mask 
)

Definition at line 57 of file dptx_hal.c.

References addr, BIOS_ERR, clrsetbits32, mask, offset, printk, REG_OFFSET_LIMIT, mtk_dp::regs, and val.

Referenced by dptx_hal_aux_setting(), dptx_hal_auxread_bytes(), dptx_hal_bypassmsa_en(), dptx_hal_init_setting(), dptx_hal_phy_setting(), dptx_hal_reset_swing_preemphasis(), dptx_hal_set_msa(), dptx_hal_setsdp_downcnt_init(), dptx_hal_setsdp_downcnt_init_inhblanking(), dptx_hal_setswing_preemphasis(), dptx_hal_settu_setencoder(), dptx_hal_ssc_en(), and mtk_dp_write_byte().

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◆ mtk_dp_read()

u32 mtk_dp_read ( struct mtk_dp *  mtk_dp,
u32  offset 
)

Definition at line 31 of file dptx_hal.c.

References addr, BIOS_ERR, offset, printk, read32(), REG_OFFSET_LIMIT, and mtk_dp::regs.

Referenced by dptx_hal_auxread_bytes(), dptx_hal_auxwrite_bytes(), dptx_hal_hpd_high(), and dptx_hal_verify_clock().

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◆ mtk_dp_write()

void mtk_dp_write ( struct mtk_dp *  mtk_dp,
u32  offset,
u32  val 
)

Definition at line 44 of file dptx_hal.c.

References addr, BIOS_ERR, offset, printk, REG_OFFSET_LIMIT, mtk_dp::regs, val, and write32().

Referenced by dptx_hal_phy_setting(), dptx_hal_set_txrate(), and mtk_dp_write_byte().

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◆ mtk_dp_write_byte()

void mtk_dp_write_byte ( struct mtk_dp *  mtk_dp,
u32  addr,
u8  val,
u32  mask 
)

Definition at line 74 of file dptx_hal.c.

References addr, DP_TX_TOP_APB_WSTRB, mask, mtk_dp_mask(), mtk_dp_write(), and val.

Referenced by dptx_hal_analog_power_en(), dptx_hal_aux_setting(), dptx_hal_auxwrite_bytes(), dptx_hal_digital_setting(), dptx_hal_digital_swreset(), dptx_hal_hpd_detect_setting(), dptx_hal_hpd_int_en(), dptx_hal_overwrite_mn(), dptx_hal_phy_setidlepattern(), dptx_hal_phyd_reset(), dptx_hal_set_color_depth(), dptx_hal_set_color_format(), dptx_hal_set_ef_mode(), dptx_hal_set_txlane(), dptx_hal_set_txtrainingpattern(), dptx_hal_setmisc(), dptx_hal_setscramble(), dptx_hal_settu_setencoder(), dptx_hal_settu_sramrd_start(), and dptx_hal_videomute().

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