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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <stdint.h>
#include <device/pci_ops.h>
#include <device/pnp_def.h>
#include <device/pnp_ops.h>
#include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
#include <superio/nuvoton/wpcm450/wpcm450.h>
#include "x9scl.h"
Go to the source code of this file.
Macros | |
#define | SERIAL_DEV PNP_DEV(X9SCL_NCT6776_PNP_BASE, NCT6776_SP1) |
#define | KCS_DEV PNP_DEV(X9SCL_WPCM450_PNP_BASE, 0x11) |
#define | SUPERIO_INITVAL(reg, data) {(reg), (data)} |
#define | SUPERIO_BANK(x) SUPERIO_INITVAL(0x07, (x)) |
Functions | |
static void | superio_init (void) |
static void | bmc_init (void) |
void | bootblock_mainboard_early_init (void) |
void | mainboard_get_spd (spd_raw_data *spd, bool id_only) |
void | mainboard_early_init (int s3resume) |
Variables | |
const struct southbridge_usb_port | mainboard_usb_ports [] |
static const uint8_t | superio_initvals [][2] |
#define KCS_DEV PNP_DEV(X9SCL_WPCM450_PNP_BASE, 0x11) |
Definition at line 18 of file early_init.c.
#define SERIAL_DEV PNP_DEV(X9SCL_NCT6776_PNP_BASE, NCT6776_SP1) |
Definition at line 17 of file early_init.c.
#define SUPERIO_BANK | ( | x | ) | SUPERIO_INITVAL(0x07, (x)) |
Definition at line 21 of file early_init.c.
#define SUPERIO_INITVAL | ( | reg, | |
data | |||
) | {(reg), (data)} |
Definition at line 20 of file early_init.c.
Definition at line 85 of file early_init.c.
References KCS_DEV, PNP_IDX_IO0, PNP_IDX_IO1, PNP_IDX_IRQ0, pnp_set_enable(), pnp_set_iobase(), pnp_set_logical_device(), pnp_write_config(), and X9SCL_WPCM450_KCS_BASE.
Referenced by bootblock_mainboard_early_init().
Definition at line 99 of file early_init.c.
References bmc_init(), nuvoton_enable_serial(), SERIAL_DEV, and superio_init().
void mainboard_early_init | ( | int | s3resume | ) |
Definition at line 114 of file early_init.c.
References GGC, PCI_DEV, and pci_write_config16().
void mainboard_get_spd | ( | spd_raw_data * | spd, |
bool | id_only | ||
) |
Definition at line 106 of file early_init.c.
References read_spd().
Definition at line 75 of file early_init.c.
References ARRAY_SIZE, nuvoton_pnp_enter_conf_state(), nuvoton_pnp_exit_conf_state(), PNP_DEV, pnp_write_config(), superio_initvals, and X9SCL_NCT6776_PNP_BASE.
Referenced by bootblock_mainboard_early_init().
const struct southbridge_usb_port mainboard_usb_ports[] |
Definition at line 1 of file early_init.c.
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static |
Definition at line 40 of file early_init.c.
Referenced by superio_init().