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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <acpi/acpi.h>
#include <acpi/acpi_pm.h>
#include <arch/io.h>
#include <device/mmio.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <intelblocks/msr.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/rtc.h>
#include <intelblocks/tco.h>
#include <soc/iomap.h>
#include <soc/cpu.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/smbus.h>
#include <security/vboot/vbnv.h>
#include "chip.h"
Go to the source code of this file.
Macros | |
#define | __SIMPLE_DEVICE__ |
Functions | |
uint8_t * | pmc_mmio_regs (void) |
uintptr_t | soc_read_pmc_base (void) |
uint32_t * | soc_pmc_etr_addr (void) |
const char *const * | soc_smi_sts_array (size_t *a) |
uint32_t | soc_get_smi_status (uint32_t generic_sts) |
const char *const * | soc_tco_sts_array (size_t *a) |
const char *const * | soc_std_gpe_sts_array (size_t *a) |
void | soc_clear_pm_registers (uintptr_t pmc_bar) |
void | soc_get_gpi_gpe_configs (uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) |
void | soc_fill_power_state (struct chipset_power_state *ps) |
int | soc_prev_sleep_state (const struct chipset_power_state *ps, int prev_sleep_state) |
static int | rtc_failed (uint32_t gen_pmcon1) |
int | soc_get_rtc_failed (void) |
int | vbnv_cmos_failed (void) |
uint16_t | get_pmbase (void) |
void | pmc_soc_set_afterg3_en (const bool on) |
Definition at line 223 of file pmutil.c.
References ACPI_BASE_ADDRESS.
Definition at line 27 of file pmutil.c.
References PCH_PWRM_BASE_ADDRESS.
Definition at line 228 of file pmutil.c.
References GEN_PMCON1, chipset_power_state::gen_pmcon1, read32p(), SLEEP_AFTER_POWER_FAIL, soc_read_pmc_base(), and write32p().
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static |
Definition at line 186 of file pmutil.c.
References RPS.
Referenced by soc_get_rtc_failed(), and vbnv_cmos_failed().
void soc_fill_power_state | ( | struct chipset_power_state * | ps | ) |
Definition at line 154 of file pmutil.c.
References BIOS_DEBUG, GEN_PMCON1, chipset_power_state::gen_pmcon1, GEN_PMCON2, chipset_power_state::gen_pmcon2, GEN_PMCON3, chipset_power_state::gen_pmcon3, printk, PRSTS, chipset_power_state::prsts, read32(), soc_read_pmc_base(), chipset_power_state::tco1_sts, TCO1_STS, chipset_power_state::tco2_sts, TCO2_STS, and tco_read_reg().
Definition at line 142 of file pmutil.c.
References config, config_of_soc, and DEVTREE_CONST.
int soc_get_rtc_failed | ( | void | ) |
Definition at line 191 of file pmutil.c.
References acpi_pm_state_for_rtc(), chipset_power_state::gen_pmcon1, and rtc_failed().
Definition at line 80 of file pmutil.c.
References ACPI_BASE_ADDRESS, GPE0_STS_BIT, inw(), PM1_STS, PM1_STS_BIT, pmc_read_pm1_control(), PWRBTN_STS, and SCI_EN.
Definition at line 37 of file pmutil.c.
References ETR, and soc_read_pmc_base().
int soc_prev_sleep_state | ( | const struct chipset_power_state * | ps, |
int | prev_sleep_state | ||
) |
Definition at line 176 of file pmutil.c.
References ACPI_S5, COLD_BOOT_STS, chipset_power_state::gen_pmcon1, chipset_power_state::pm1_sts, prev_sleep_state(), and WAK_STS.
Definition at line 32 of file pmutil.c.
References pmc_mmio_regs().
const char* const* soc_smi_sts_array | ( | size_t * | a | ) |
Definition at line 42 of file pmutil.c.
References APM_STS_BIT, ARRAY_SIZE, BIOS_STS_BIT, GPE0_STS_BIT, GPIO_STS_BIT, GPIO_UNLOCK_SMI_STS_BIT, LEGACY_USB_STS_BIT, MC_SMI_STS_BIT, PCI_EXP_SMI_STS_BIT, PERIODIC_STS_BIT, PM1_STS_BIT, PMC_OCP_SMI_STS_BIT, SCC2_SMI_STS_BIT, SCS_SMI_STS_BIT, SERIRQ_SMI_STS_BIT, SMBUS_SMI_STS_BIT, SMI_ON_SLP_EN_STS_BIT, SPI_SMI_STS_BIT, SPI_SSMI_STS_BIT, SWSMI_TMR_STS_BIT, TCO_STS_BIT, and XHCI_SMI_STS_BIT.
const char* const* soc_std_gpe_sts_array | ( | size_t * | a | ) |
Definition at line 108 of file pmutil.c.
References ARRAY_SIZE.
const char* const* soc_tco_sts_array | ( | size_t * | a | ) |
Definition at line 97 of file pmutil.c.
References ARRAY_SIZE.
int vbnv_cmos_failed | ( | void | ) |
Definition at line 201 of file pmutil.c.
References BIOS_INFO, GEN_PMCON1, chipset_power_state::gen_pmcon1, GEN_PMCON1_CLR1_BITS, printk, read32(), RPS, rtc_failed(), rtc_failure(), soc_read_pmc_base(), and write32().