early_init.c

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/* SPDX-License-Identifier: GPL-2.0-only */
 
#include <bootblock_common.h>
#include <stdint.h>
#include <arch/io.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <superio/smsc/sio1007/sio1007.h>
#include <southbridge/intel/bd82x6x/pch.h>
 
#define SIO_PORT 0x164e
 
const struct southbridge_usb_port mainboard_usb_ports[] = {
        { 1, 1, 0 },
        { 1, 1, 0 },
        { 1, 1, 1 },
        { 1, 1, 1 },
        { 1, 0, 2 },
        { 1, 0, 2 },
        { 1, 0, 3 },
        { 1, 0, 3 },
        { 1, 1, 4 },
        { 1, 1, 4 },
        { 1, 0, 5 },
        { 1, 0, 5 },
        { 1, 0, 6 },
        { 1, 0, 6 },
};
 
void bootblock_mainboard_early_init(void)
{
        const u16 port = SIO_PORT;
        const u16 runtime_port = 0x180;
 
        /* Enable COM1 if requested */
        if (CONFIG(DRIVERS_UART_8250IO))
                sio1007_enable_uart_at(port);
 
        /* Turn on configuration mode. */
        outb(0x55, port);
 
        /* Set the GPIO direction, polarity, and type. */
        sio1007_setreg(port, 0x31, 1 << 0, 1 << 0);
        sio1007_setreg(port, 0x32, 0 << 0, 1 << 0);
        sio1007_setreg(port, 0x33, 0 << 0, 1 << 0);
 
        /* Set the base address for the runtime register block. */
        sio1007_setreg(port, 0x30, runtime_port >> 4, 0xff);
        sio1007_setreg(port, 0x21, runtime_port >> 12, 0xff);
 
        /* Turn on address decoding for it. */
        sio1007_setreg(port, 0x3a, 1 << 1, 1 << 1);
 
        /* Set the value of GPIO 10 by changing GP1, bit 0. */
        u8 byte;
        byte = inb(runtime_port + 0xc);
        byte |= (1 << 0);
        outb(byte, runtime_port + 0xc);
 
        /* Turn off address decoding for it. */
        sio1007_setreg(port, 0x3a, 0 << 1, 1 << 1);
 
        /* Turn off configuration mode. */
        outb(0xaa, port);
}
 
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
{
        read_spd(&spd[0], 0x50, id_only);
        read_spd(&spd[2], 0x52, id_only);
}