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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/mmio.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <soc/addressmap.h>
#include <soc/cavium/common/pci/chip.h>
#include <soc/ecam.h>
Go to the source code of this file.
Macros | |
#define | CAVM_PCCPF_XXX_VSEC_CTL 0x108 |
#define | CAVM_PCCPF_XXX_VSEC_SCTL 0x10c |
Functions | |
static void | disable_func (unsigned int devfn) |
static void | enable_func (unsigned int devfn) |
static void | disable_device (unsigned int dev) |
static void | enable_device (unsigned int dev) |
static void | ecam0_read_resources (struct device *dev) |
static void | ecam0_fix_missing_devices (struct bus *link) |
static size_t | ecam0_pci_enable_msix (struct device *dev, struct msix_entry *entries, size_t nvec) |
pci_enable_msix - configure device's MSI-X capability structure @dev: pointer to the pci_dev data structure of MSI-X device function @entries: pointer to an array of MSI-X entries @nvec: number of MSI-X irqs requested for allocation by device driver More... | |
static void | ecam0_init (struct device *dev) |
Variables | |
struct device_operations | pci_domain_ops_ecam0 |
Definition at line 60 of file ecam0.c.
References addr, BIOS_DEBUG, ECAM0_DEVX_NSDIS, ECAM0_DEVX_SDIS, printk, read64(), and write64().
Referenced by ecam0_init().
Definition at line 21 of file ecam0.c.
References addr, BIOS_DEBUG, ECAM0_RSLX_SDIS, printk, read64(), and write64().
Referenced by ecam0_init().
Cavium thinks it's a good idea to violate the PCI spec. Disabled multi-function PCI devices might have active functions. Add devices here manually, as coreboot's PCI allocator won't find them otherwise...
Definition at line 104 of file ecam0.c.
References pci_path::devfn, DEVICE_PATH_PCI, find_dev_path(), NULL, PCI_DEVFN, and pci_probe_dev().
Referenced by ecam0_init().
Search for missing devices on BUS 1. Only required for ARI capability programming.
Definition at line 212 of file ecam0.c.
References BIOS_INFO, bridge, CAVM_GICD_CLRSPI_NSR, CAVM_GICD_SETSPI_NSR, CAVM_PCCPF_XXX_VSEC_CTL, CAVM_PCCPF_XXX_VSEC_SCTL, device::chip_info, config, pci_path::devfn, disable_device(), disable_func(), ecam0_fix_missing_devices(), ecam0_pci_enable_msix(), enable_device(), enable_func(), device::enabled, NULL, device::path, device_path::pci, PCI_DEVFN, pci_read_config32(), pci_write_config32(), pcidev_on_root(), pcidev_path_behind(), and printk.
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static |
pci_enable_msix - configure device's MSI-X capability structure @dev: pointer to the pci_dev data structure of MSI-X device function @entries: pointer to an array of MSI-X entries @nvec: number of MSI-X irqs requested for allocation by device driver
Setup the MSI-X capability structure of device function with the number of requested irqs upon its software driver call to request for MSI-X mode enabled on its hardware device function. A return of zero indicates the successful configuration of MSI-X capability structure. A return of < 0 indicates a failure. Or a return of > 0 indicates that driver request is exceeding the number of irqs or MSI-X vectors available. Driver should use the returned value to re-send its request.
Definition at line 142 of file ecam0.c.
References addr, BIOS_ERR, dev_path(), ecam0_get_bar_val(), offset, PCI_CAP_ID_MSIX, pci_find_capability(), PCI_MSIX_FLAGS, PCI_MSIX_FLAGS_ENABLE, PCI_MSIX_FLAGS_MASKALL, pci_msix_table_bar(), pci_msix_table_size(), pci_read_config16(), pci_write_config16(), printk, write32(), and write64().
Referenced by ecam0_init().
Definition at line 81 of file ecam0.c.
References addr, BIOS_DEBUG, ECAM0_DEVX_NSDIS, ECAM0_DEVX_SDIS, printk, read64(), and write64().
Referenced by ecam0_init().
Definition at line 38 of file ecam0.c.
References addr, BIOS_DEBUG, ECAM0_RSLX_NSDIS, ECAM0_RSLX_SDIS, printk, read64(), and write64().
Referenced by ecam0_init().
struct device_operations pci_domain_ops_ecam0 |
Definition at line 212 of file ecam0.c.
Referenced by enable_soc_dev().