coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <assert.h>
#include <commonlib/helpers.h>
#include <device/mmio.h>
#include <soc/clock.h>
#include <types.h>
Go to the source code of this file.
Functions | |
static int | clock_configure_gpll0 (void) |
void | clock_configure_qspi (uint32_t hz) |
void | clock_configure_dfsr (int qup) |
void | clock_enable_qup (int qup) |
static enum cb_err | pll_init_and_set (struct sc7180_apss_clock *apss, u32 l_val) |
static void | speed_up_boot_cpu (void) |
enum cb_err | mdss_clock_configure (enum mdss_clock clk_type, uint32_t source, uint32_t divider, uint32_t m, uint32_t n, uint32_t d_2) |
int | mdss_clock_enable (enum mdss_clock clk_type) |
void | clock_init (void) |
Variables | |
static struct clock_freq_config | qspi_core_cfg [] |
static struct clock_freq_config | qupv3_wrap_cfg [] |
static struct clock_rcg_mnd * | mdss_clock [MDSS_CLK_COUNT] |
static u32 * | mdss_cbcr [MDSS_CLK_COUNT] |
void clock_configure_dfsr | ( | int | qup | ) |
Definition at line 126 of file clock.c.
References ARRAY_SIZE, clock_configure_dfsr_table(), and qupv3_wrap_cfg.
Referenced by qupv3_se_fw_load_and_init().
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Definition at line 101 of file clock.c.
References clock_configure_enable_gpll(), gcc, qcs405_gcc::gpll0, PLL_PLLOUT_EVEN_SHFT, PLL_PLLOUT_MAIN_SHFT, PLL_PLLOUT_ODD_SHFT, PLL_POST_DIV_EVEN_SHFT, alpha_pll_reg_val_config::reg_user_ctl, alpha_pll_reg_val_config::reg_user_ctl_hi, SCALE_FREQ_SHFT, qcs405_gpll::user_ctl, alpha_pll_reg_val_config::user_ctl_hi_val, qcs405_gpll::user_ctl_u, and alpha_pll_reg_val_config::user_ctl_val.
Referenced by clock_init().
void clock_enable_qup | ( | int | qup | ) |
Definition at line 132 of file clock.c.
References qupv3_clock::cbcr, clock_enable_vote(), gcc, QUP_WRAP1_S0, QUPV3_WRAP0_CLK_ENA_S, QUPV3_WRAP1_CLK_ENA_S, and s.
Referenced by i2c_init(), qup_spi_init(), qupv3_fw_init(), and uart_init().
Definition at line 229 of file clock.c.
References clock_configure_gpll0(), clock_enable_vote(), gcc, QUPV3_WRAP0_CORE_2X_CLK_ENA, QUPV3_WRAP0_CORE_CLK_ENA, QUPV3_WRAP1_CORE_2X_CLK_ENA, QUPV3_WRAP1_CORE_CLK_ENA, QUPV3_WRAP_0_M_AHB_CLK_ENA, QUPV3_WRAP_0_S_AHB_CLK_ENA, QUPV3_WRAP_1_M_AHB_CLK_ENA, QUPV3_WRAP_1_S_AHB_CLK_ENA, and speed_up_boot_cpu().
enum cb_err mdss_clock_configure | ( | enum mdss_clock | clk_type, |
uint32_t | source, | ||
uint32_t | divider, | ||
uint32_t | m, | ||
uint32_t | n, | ||
uint32_t | d_2 | ||
) |
Definition at line 180 of file clock.c.
References apss_l3, apss_silver, BIOS_DEBUG, L_VAL_1209P6MHz, L_VAL_1516P8MHz, pll_init_and_set(), and printk.
int mdss_clock_enable | ( | enum mdss_clock | clk_type | ) |
Definition at line 220 of file clock.c.
References CB_ERR, clock_enable(), mdss_cbcr, and MDSS_CLK_COUNT.
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Definition at line 132 of file clock.c.
Referenced by mdss_clock_configure().
Definition at line 180 of file clock.c.
Referenced by clock_init().
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Definition at line 1 of file clock.c.
Referenced by clock_configure_qspi().
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Definition at line 1 of file clock.c.
Referenced by clock_configure_dfsr().