77 struct pei_data pei_data_template = {
79 .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
80 .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
81 .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
82 .pciexbar = CONFIG_ECAM_MMCONF_BASE_ADDRESS,
83 .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
94 .ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
97 .max_ddr3_freq = 1600,
115 .ddr_refresh_rate_config = 2,
#define HPET_BASE_ADDRESS
void mainboard_late_rcba_config(void)
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
const struct southbridge_usb_port mainboard_usb_ports[]
void mainboard_fill_pei_data(struct pei_data *pei)
int mainboard_should_reset_usb(int s3resume)
void read_spd(spd_raw_data *spd, u8 addr, bool id_only)
#define DIR_ROUTE(a, b, c, d)