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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/common/pmbase.h>
#include "i82801gx.h"
#include "chip.h"
Go to the source code of this file.
Macros | |
#define | TCO_BASE 0x60 |
Functions | |
void | i82801gx_lpc_setup (void) |
void | i82801gx_setup_bars (void) |
#define TCO_BASE 0x60 |
Definition at line 58 of file early_init.c.
Definition at line 11 of file early_init.c.
References device::chip_info, CNF1_LPC_EN, CNF2_LPC_EN, COMA_LPC_EN, COMB_LPC_EN, config, FDD_LPC_EN, GAMEH_LPC_EN, GAMEL_LPC_EN, GEN1_DEC, GEN2_DEC, GEN3_DEC, GEN4_DEC, KBC_LPC_EN, LPC_EN, LPC_IO_DEC, LPT_LPC_EN, MC_LPC_EN, PCI_DEV, pci_write_config16(), pci_write_config32(), pci_write_config8(), pcidev_on_root(), and SERIRQ_CNTL.
Referenced by bootblock_early_southbridge_init().
Definition at line 47 of file early_init.c.
References ACPI_CNTL, ACPI_EN, DEFAULT_GPIOBASE, DEFAULT_PMBASE, GPIO_CNTL, GPIO_EN, GPIOBASE, PCI_DEV, pci_write_config32(), pci_write_config8(), PMBASE, and RCBA.
Referenced by bootblock_early_southbridge_init(), and bootblock_mainboard_early_init().