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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <acpi/acpi.h>
#include <arch/hpet.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <cpu/intel/model_2065x/model_2065x.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "chip.h"
#include <commonlib/bsd/helpers.h>
#include "ironlake.h"
#include <cpu/intel/smm_reloc.h>
Go to the source code of this file.
Functions | |
int | bridge_silicon_revision (void) |
static void | add_fixed_resources (struct device *dev, int index) |
static void | mc_read_resources (struct device *dev) |
static void | northbridge_init (struct device *dev) |
static void | ironlake_init (void *const chip_info) |
static void | enable_dev (struct device *dev) |
Variables | |
static int | bridge_revision_id = -1 |
static const int | legacy_hole_base_k = 0xa0000 / 1024 |
static struct device_operations | pci_domain_ops |
static struct device_operations | mc_ops |
static const unsigned short | pci_device_ids [] |
static const struct pci_driver mc_driver_ilk | __pci_driver |
static struct device_operations | cpu_bus_ops |
struct chip_operations | northbridge_intel_ironlake_ops |
Definition at line 38 of file northbridge.c.
References resource::base, resource::flags, HPET_BASE_ADDRESS, resource::index, IORESOURCE_ASSIGNED, IORESOURCE_FIXED, IORESOURCE_MEM, IORESOURCE_RESERVE, IORESOURCE_STORED, KiB, legacy_hole_base_k, mmio_resource, new_resource(), reserved_ram_resource, and resource::size.
Referenced by mc_read_resources().
int bridge_silicon_revision | ( | void | ) |
Definition at line 19 of file northbridge.c.
References bridge_revision_id, cpuid_eax(), PCI_DEVICE_ID, pci_read_config16(), pcidev_on_root(), and stepping.
Definition at line 228 of file northbridge.c.
References cpu_bus_ops, DEVICE_PATH_CPU_CLUSTER, DEVICE_PATH_DOMAIN, device::ops, device::path, pci_domain_ops, and device_path::type.
Definition at line 162 of file northbridge.c.
References BIOS_DEBUG, DEVEN, DEVEN_IGD, DEVEN_PEG10, device::enabled, pci_update_config32(), pcidev_on_root(), printk, and UINT32_MAX.
Definition at line 88 of file northbridge.c.
References add_fixed_resources(), bad_ram_resource, BIOS_DEBUG, GGC, GTT_BASE, IGD_BASE, KiB, MiB, mmconf_resource(), mmio_resource, pci_dev_read_resources(), pci_read_config16(), pci_read_config32(), pcidev_on_root(), printk, ram_resource, TOUUD, and TSEG.
Definition at line 148 of file northbridge.c.
References dmibar_setbits32, dmibar_write32(), DMICESTS, DMILCTL, DMILLTC, and DMIUESTS.
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Definition at line 203 of file northbridge.c.
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Definition at line 17 of file northbridge.c.
Referenced by bridge_silicon_revision().
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Definition at line 203 of file northbridge.c.
Referenced by enable_dev().
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Definition at line 36 of file northbridge.c.
Referenced by add_fixed_resources().
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Definition at line 162 of file northbridge.c.
struct chip_operations northbridge_intel_ironlake_ops |
Definition at line 228 of file northbridge.c.
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Definition at line 203 of file northbridge.c.
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Definition at line 38 of file northbridge.c.
Referenced by enable_dev().