coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.c File Reference
#include <device/device.h>
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
#include <intelblocks/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/gpio.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcie_rp.h>
#include <intelblocks/xdci.h>
#include <soc/intel/common/vbt.h>
#include <soc/itss.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/soc_chip.h>
Include dependency graph for chip.c:

Go to the source code of this file.

Functions

static void soc_fill_gpio_pm_configuration (void)
 
void soc_init_pre_device (void *chip_info)
 
static void soc_enable (struct device *dev)
 

Variables

static const struct pcie_rp_group pch_rp_groups []
 
static struct device_operations pci_domain_ops
 
static struct device_operations cpu_bus_ops
 
struct device_operations pmc_ops
 
struct chip_operations soc_intel_jasperlake_ops
 

Function Documentation

◆ soc_enable()

static void soc_enable ( struct device dev)
static

◆ soc_fill_gpio_pm_configuration()

static void soc_fill_gpio_pm_configuration ( void  )
static

Definition at line 108 of file chip.c.

References config, config_of_soc, gpio_pm_configure(), memcpy(), memset(), MISCCFG_GPIO_PM_CONFIG_BITS, TOTAL_GPIO_COMM, and value.

Here is the call graph for this function:

◆ soc_init_pre_device()

void soc_init_pre_device ( void chip_info)

Definition at line 121 of file chip.c.

Variable Documentation

◆ cpu_bus_ops

struct device_operations cpu_bus_ops
static
Initial value:
= {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
}
static void noop_read_resources(struct device *dev)
Standard device operations function pointers shims.
Definition: device.h:73
static void noop_set_resources(struct device *dev)
Definition: device.h:74

Definition at line 121 of file chip.c.

◆ pch_rp_groups

const struct pcie_rp_group pch_rp_groups[]
static
Initial value:
= {
{ .slot = PCH_DEV_SLOT_PCIE, .count = 8, .lcap_port_base = 1 },
{ 0 }
}
#define PCH_DEV_SLOT_PCIE
Definition: pci_devs.h:175

Definition at line 1 of file chip.c.

◆ pci_domain_ops

struct device_operations pci_domain_ops
static
Initial value:
= {
.read_resources = &pci_domain_read_resources,
.set_resources = &pci_domain_set_resources,
.scan_bus = &pci_domain_scan_bus,
}
void pci_domain_read_resources(struct device *dev)
Definition: pci_device.c:547
void pci_domain_set_resources(struct device *dev)
Definition: pci_device.c:564
void pci_domain_scan_bus(struct device *dev)
Scan a PCI domain.
Definition: pci_device.c:1610

Definition at line 121 of file chip.c.

Referenced by soc_enable().

◆ pmc_ops

struct device_operations pmc_ops
extern

Definition at line 185 of file pmc.c.

◆ soc_intel_jasperlake_ops

struct chip_operations soc_intel_jasperlake_ops
Initial value:
= {
.enable_dev = &soc_enable,
}
void soc_init_pre_device(void *chip_info)
Definition: chip.c:137
static void soc_enable(struct device *dev)
Definition: chip.c:153

Definition at line 153 of file chip.c.