coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lpc.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <device/pci.h>
5 #include <pc80/isa-dma.h>
6 #include <pc80/i8259.h>
7 #include <arch/io.h>
8 #include <device/pci_ops.h>
9 #include <arch/ioapic.h>
10 #include <intelblocks/itss.h>
11 #include <intelblocks/lpc_lib.h>
12 #include <soc/iomap.h>
13 #include <soc/irq.h>
14 #include <soc/lpc.h>
15 #include <soc/pci_devs.h>
16 #include <soc/pcr_ids.h>
17 
18 #include "chip.h"
19 
21 {
22  const config_t *config = config_of_soc();
23 
24  gen_io_dec[0] = config->gen1_dec;
25  gen_io_dec[1] = config->gen2_dec;
26  gen_io_dec[2] = config->gen3_dec;
27  gen_io_dec[3] = config->gen4_dec;
28 }
29 
30 #if ENV_RAMSTAGE
31 void lpc_soc_init(struct device *dev)
32 {
33  const config_t *config = dev->chip_info;
34 
35  /* Legacy initialization */
36  isa_dma_init();
37  pch_misc_init();
38 
39  /* Enable CLKRUN_EN for power gating LPC */
41 
42  /* Set LPC Serial IRQ mode */
43  lpc_set_serirq_mode(config->serirq_mode);
44 
45  /* Interrupt configuration */
47  pch_pirq_init();
48  setup_i8259();
50 }
51 
52 #endif
void setup_i8259(void)
Definition: i8259.c:46
void i8259_configure_irq_trigger(int int_num, int is_level_triggered)
Configure IRQ triggering in the i8259 compatible Interrupt Controller.
Definition: i8259.c:99
#define config_of_soc()
Definition: device.h:394
void isa_dma_init(void)
Definition: isa-dma.c:35
void lpc_enable_pci_clk_cntl(void)
Definition: lpc_lib.c:292
void lpc_set_serirq_mode(enum serirq_mode mode)
Definition: lpc_lib.c:226
#define LPC_NUM_GENERIC_IO_RANGES
Definition: lpc_lib.h:26
enum board_config config
Definition: memory.c:448
void lpc_soc_init(struct device *dev)
Definition: lpc.c:10
static void pch_misc_init(struct device *dev)
Definition: lpc.c:166
void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
Definition: lpc.c:20
static void pch_enable_ioapic(struct device *dev)
Set miscellaneous static southbridge features.
Definition: lpc.c:32
static void pch_pirq_init(struct device *dev)
Definition: lpc.c:100
unsigned int uint32_t
Definition: stdint.h:14
Definition: device.h:107
DEVTREE_CONST void * chip_info
Definition: device.h:164