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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <option.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <acpi/acpi.h>
#include <cpu/x86/smm.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/rcba.h>
#include <soc/intel/broadwell/pch/chip.h>
#include <acpi/acpigen.h>
#include <southbridge/intel/common/rtc.h>
#include <southbridge/intel/lynxpoint/iobp.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
Go to the source code of this file.
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#define | LPC_DEFAULT_IO_RANGE_LOWER 0 |
#define | LPC_DEFAULT_IO_RANGE_UPPER 0x1000 |
Variables | |
static struct device_operations | device_ops |
static const unsigned short | pci_device_ids [] |
static const struct pci_driver pch_lpc | __pci_driver |
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Definition at line 589 of file lpc.c.
References ACPI_ACCESS_SIZE_DWORD_ACCESS, acpi_write_dbg2_pci_uart(), acpi_write_hpet(), CONFIG, PCH_DEV_UART0, and PCH_DEV_UART1.
Definition at line 39 of file lpc.c.
References LPC_HnBDF, PCH_HPET_PCI_BUS, PCH_HPET_PCI_SLOT, and pci_write_config16().
Referenced by lpc_init(), and sdram_initialize().
Definition at line 438 of file lpc.c.
References enable_hpet(), i8259_configure_irq_trigger(), isa_dma_init(), pch_cg_init(), pch_enable_ioapic(), pch_misc_init(), pch_pirq_init(), pch_pm_init(), pch_power_options(), pch_set_acpi_mode(), sb_rtc_init(), and setup_i8259().
Definition at line 365 of file lpc.c.
References BUC, CG, FD, GEN_PMCON_1, PCH_DISABLE_GBE, PCH_DISABLE_HD_AUDIO, pch_iobp_update(), pch_is_wpt(), pci_read_config16(), pci_read_config8(), pci_write_config16(), pcidev_path_on_root(), RCBA32, RCBA32_AND_OR, RCBA32_OR, and SA_DEVFN_IGD.
Referenced by lpc_init().
Definition at line 26 of file lpc.c.
References ioapic_set_max_vectors(), LPC_IBDF, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, pci_write_config16(), setup_ioapic(), and VIO_APIC_VADDR.
Referenced by chip_init(), and lpc_init().
Definition at line 280 of file lpc.c.
References BIOS_DEBUG, gpio_is_native(), pch_iobp_update(), pch_is_wpt(), pch_is_wpt_ulx(), pch_read_soft_strap(), and printk.
Referenced by pch_pm_init().
Definition at line 317 of file lpc.c.
References device::chip_info, config, DEEP_S3_EN_AC, DEEP_S3_EN_DC, DEEP_S3_POL, DEEP_S5_EN_AC, DEEP_S5_EN_DC, DEEP_S5_POL, DEEP_SX_CONFIG, DEEP_SX_GP27_PIN_EN, DEEP_SX_WAKE_PIN_EN, and RCBA32_OR.
Referenced by pch_pm_init().
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Definition at line 503 of file lpc.c.
References base, LPC_DEFAULT_IO_RANGE_LOWER, LPC_DEFAULT_IO_RANGE_UPPER, and resource::size.
Referenced by pch_lpc_add_io_resource().
Definition at line 536 of file lpc.c.
References base, resource::index, pch_lpc_add_io_resource(), and resource::size.
Referenced by pch_lpc_add_io_resources().
Definition at line 522 of file lpc.c.
References resource::base, base, resource::flags, resource::index, IORESOURCE_ASSIGNED, IORESOURCE_FIXED, IORESOURCE_IO, new_resource(), pch_io_range_in_default(), and resource::size.
Referenced by pch_lpc_add_gen_io_resources(), and pch_lpc_add_io_resources().
Definition at line 550 of file lpc.c.
References ACPI_BASE_ADDRESS, ACPI_BASE_SIZE, resource::base, device::chip_info, config, resource::flags, GPIO_BASE, GPIO_BASE_ADDRESS, GPIO_BASE_SIZE, IORESOURCE_ASSIGNED, IORESOURCE_FIXED, IORESOURCE_IO, LPC_DEFAULT_IO_RANGE_LOWER, LPC_DEFAULT_IO_RANGE_UPPER, LPC_GEN1_DEC, LPC_GEN2_DEC, LPC_GEN3_DEC, LPC_GEN4_DEC, new_resource(), pch_lpc_add_gen_io_resources(), pch_lpc_add_io_resource(), PMBASE, and resource::size.
Referenced by pch_lpc_read_resources().
Definition at line 460 of file lpc.c.
References resource::base, resource::flags, IO_APIC_ADDR, IORESOURCE_ASSIGNED, IORESOURCE_FIXED, IORESOURCE_MEM, IORESOURCE_RESERVE, LGMR, new_resource(), OIC, pci_read_config32(), RCBA, and resource::size.
Referenced by pch_lpc_read_resources().
Definition at line 577 of file lpc.c.
References pch_lpc_add_io_resources(), pch_lpc_add_mmio_resources(), and pci_dev_read_resources().
Definition at line 166 of file lpc.c.
References ACPI_BASE_ADDRESS, BIOS_CNTL, CONFIG, GEN_PMCON_2, inb(), inl(), outb(), outl(), pci_and_config8(), pci_or_config8(), pci_read_config8(), pci_write_config8(), PM1_CNT, RCBA32_AND_OR, RCBA32_OR, SCI_EN, SERIRQ_CNTL, and SLP_TYP.
Referenced by lpc_init(), and lpc_soc_init().
Definition at line 70 of file lpc.c.
References all_devices, DEVICE_PATH_PCI, device::enabled, device::next, device::path, PCI_INTERRUPT_LINE, PCI_INTERRUPT_PIN, pci_read_config8(), pci_write_config8(), PIRQA_ROUT, PIRQB_ROUT, PIRQC_ROUT, PIRQD_ROUT, PIRQE_ROUT, PIRQF_ROUT, PIRQG_ROUT, PIRQH_ROUT, and device_path::type.
Referenced by lpc_init().
Definition at line 340 of file lpc.c.
References BIOS_DEBUG, FD, PCH_DISABLE_ADSPD, pch_enable_mphy(), pch_init_deep_sx(), pch_iobp_update(), pch_is_wpt(), pch_pm_init_magic(), printk, RCBA32, and RCBA32_OR.
Referenced by lpc_init().
Definition at line 214 of file lpc.c.
References pci_update_config32(), pci_write_config8(), RCBA32, RCBA32_AND_OR, and RCBA32_OR.
Referenced by pch_pm_init().
Definition at line 110 of file lpc.c.
References BIOS_INFO, device::chip_info, config, enable_all_gpe(), enable_alt_smi(), GEN_PMCON_3, get_uint_option(), MAINBOARD_POWER_KEEP, MAINBOARD_POWER_OFF, MAINBOARD_POWER_ON, pci_read_config16(), pci_write_config16(), and printk.
Referenced by lpc_init().
Definition at line 431 of file lpc.c.
References acpi_is_wakeup_s3(), APM_CNT_ACPI_DISABLE, and apm_control().
Referenced by lpc_init().
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