coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pch.c File Reference
#include <console/console.h>
#include <device/mmio.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/gpio.h>
#include <intelblocks/gspi.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/p2sb.h>
#include <intelblocks/pcr.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/rtc.h>
#include <soc/bootblock.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
#include <soc/p2sb.h>
#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
#include <soc/pm.h>
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Macros

#define PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_LP   0x1400
 
#define PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_H   0x0980
 
#define PCR_PSFX_TO_SHDW_BAR0   0
 
#define PCR_PSFX_TO_SHDW_BAR1   0x4
 
#define PCR_PSFX_TO_SHDW_BAR2   0x8
 
#define PCR_PSFX_TO_SHDW_BAR3   0xC
 
#define PCR_PSFX_TO_SHDW_BAR4   0x10
 
#define PCR_PSFX_TO_SHDW_PCIEN_IOEN   0x01
 
#define PCR_PSFX_T0_SHDW_PCIEN   0x1C
 

Functions

static uint32_t get_pmc_reg_base (void)
 
static void soc_config_pwrmbase (void)
 
void bootblock_pch_early_init (void)
 
static void soc_config_acpibase (void)
 
void pch_early_iorange_init (void)
 
void bootblock_pch_init (void)
 

Macro Definition Documentation

◆ PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_H

#define PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_H   0x0980

Definition at line 26 of file pch.c.

◆ PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_LP

#define PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_LP   0x1400

Definition at line 25 of file pch.c.

◆ PCR_PSFX_T0_SHDW_PCIEN

#define PCR_PSFX_T0_SHDW_PCIEN   0x1C

Definition at line 34 of file pch.c.

◆ PCR_PSFX_TO_SHDW_BAR0

#define PCR_PSFX_TO_SHDW_BAR0   0

Definition at line 28 of file pch.c.

◆ PCR_PSFX_TO_SHDW_BAR1

#define PCR_PSFX_TO_SHDW_BAR1   0x4

Definition at line 29 of file pch.c.

◆ PCR_PSFX_TO_SHDW_BAR2

#define PCR_PSFX_TO_SHDW_BAR2   0x8

Definition at line 30 of file pch.c.

◆ PCR_PSFX_TO_SHDW_BAR3

#define PCR_PSFX_TO_SHDW_BAR3   0xC

Definition at line 31 of file pch.c.

◆ PCR_PSFX_TO_SHDW_BAR4

#define PCR_PSFX_TO_SHDW_BAR4   0x10

Definition at line 32 of file pch.c.

◆ PCR_PSFX_TO_SHDW_PCIEN_IOEN

#define PCR_PSFX_TO_SHDW_PCIEN_IOEN   0x01

Definition at line 33 of file pch.c.

Function Documentation

◆ bootblock_pch_early_init()

void bootblock_pch_early_init ( void  )

Definition at line 62 of file pch.c.

References fast_spi_early_init(), gspi_early_bar_init(), p2sb_configure_hpet(), p2sb_enable_bar(), soc_config_pwrmbase(), and SPI_BASE_ADDRESS.

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◆ bootblock_pch_init()

void bootblock_pch_init ( void  )

Definition at line 127 of file pch.c.

References enable_rtc_upper_bank(), gpi_clear_int_cfg(), pmc_gpe_init(), soc_config_acpibase(), and soc_gpio_pm_configuration().

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◆ get_pmc_reg_base()

static uint32_t get_pmc_reg_base ( void  )
static

Definition at line 36 of file pch.c.

References CONFIG, PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_H, and PCR_PSF3_TO_SHDW_PMC_REG_BASE_CNP_LP.

Referenced by soc_config_acpibase().

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◆ pch_early_iorange_init()

void pch_early_iorange_init ( void  )

◆ soc_config_acpibase()

static void soc_config_acpibase ( void  )
static

Definition at line 81 of file pch.c.

References ACPI_BASE_ADDRESS, die_with_post_code, get_pmc_reg_base(), PCR_PSFX_T0_SHDW_PCIEN, PCR_PSFX_TO_SHDW_BAR4, PCR_PSFX_TO_SHDW_PCIEN_IOEN, pcr_read32(), pcr_rmw32(), pcr_write32(), PID_PSF3, and POST_HW_INIT_FAILURE.

Referenced by bootblock_pch_init().

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◆ soc_config_pwrmbase()

static void soc_config_pwrmbase ( void  )
static

Definition at line 44 of file pch.c.

References ACTL, PCH_DEV_PMC, PCH_PWRM_BASE_ADDRESS, pci_and_config16(), PCI_COMMAND, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, pci_or_config16(), pci_write_config32(), PWRM_EN, PWRMBASE, and setbits32.

Referenced by bootblock_pch_early_init().

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