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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <acpi/acpi_device.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <drivers/intel/dptf/chip.h>
#include <intelblocks/power_limit.h>
Go to the source code of this file.
Functions | |
WEAK_DEV_PTR (dptf_policy) | |
void | variant_update_power_limits (const struct cpu_power_limits *limits, size_t num_entries) |
void variant_update_power_limits | ( | const struct cpu_power_limits * | limits, |
size_t | num_entries | ||
) |
Definition at line 14 of file ramstage.c.
References BIOS_INFO, device::chip_info, config, config_of_soc, cpu_tdp, DEV_PTR, DIV_ROUND_UP, get_cpu_tdp(), limits, dptf_power_limit_config::max_power, mchid, MILLIWATTS_TO_WATTS, dptf_power_limit_config::min_power, PCI_DEV, PCI_DEVICE_ID, pci_s_read_config16(), dptf_power_limits::pl1, cpu_power_limits::pl1_max_power, cpu_power_limits::pl1_min_power, dptf_power_limits::pl2, cpu_power_limits::pl2_max_power, cpu_power_limits::pl2_min_power, printk, and soc_power_limits_config::tdp_pl4.
WEAK_DEV_PTR | ( | dptf_policy | ) |