coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
variants.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __BASEBOARD_VARIANTS_H__
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#define __BASEBOARD_VARIANTS_H__
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#include <chip.h>
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#include <soc/gpio.h>
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#include <soc/meminit.h>
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#include <
stdint.h
>
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/* The next set of functions return the gpio table and fill in the number of entries for
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* each table.
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*/
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const
struct
pad_config
*
variant_gpio_table
(
size_t
*num);
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const
struct
pad_config
*
variant_gpio_override_table
(
size_t
*num);
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const
struct
pad_config
*
variant_early_gpio_table
(
size_t
*num);
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const
struct
pad_config
*
variant_romstage_gpio_table
(
size_t
*num);
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const
struct
mb_cfg
*
variant_memory_params
(
void
);
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void
variant_get_spd_info
(
struct
mem_spd
*
spd_info
);
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int
variant_memory_sku
(
void
);
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bool
variant_is_half_populated
(
void
);
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void
variant_update_soc_chip_config
(
struct
soc_intel_alderlake_config
*
config
);
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void
variant_fill_ssdt
(
const
struct
device
*dev);
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enum
s0ix_entry
{
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S0IX_EXIT
,
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S0IX_ENTRY
,
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};
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void
variant_generate_s0ix_hook
(
enum
s0ix_entry
entry);
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/* Modify devictree settings during ramstage */
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void
variant_devtree_update
(
void
);
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void
variant_update_descriptor
(
void
);
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struct
cpu_power_limits
{
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uint16_t
mchid
;
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u8
cpu_tdp
;
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unsigned
int
pl1_min_power
;
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unsigned
int
pl1_max_power
;
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unsigned
int
pl2_min_power
;
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unsigned
int
pl2_max_power
;
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unsigned
int
pl4_power
;
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};
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struct
system_power_limits
{
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uint16_t
mchid
;
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u8
cpu_tdp
;
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/* PsysPL2 in Watts */
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unsigned
int
psys_pl2_power
;
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};
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struct
psys_config
{
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/*
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* The efficiency of type-c chargers
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* For example, 'efficiency = 97' means setting 97% of max power to account for
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* cable loss and FET Rdson loss in the path from the source.
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*/
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unsigned
int
efficiency
;
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/* The maximum current maps to the Psys signal */
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unsigned
int
psys_imax_ma
;
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/* The voltage of barrel jack */
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unsigned
int
bj_volts_mv
;
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};
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/* Modify Power Limit devictree settings during ramstage */
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void
variant_update_power_limits
(
const
struct
cpu_power_limits
*
limits
,
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size_t
num_entries);
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/*
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* Modify Power Limit and PsysPL devictree settings during ramstage.
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* Note, this function must be called in front of calling variant_update_power_limits.
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*/
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void
variant_update_psys_power_limits
(
const
struct
cpu_power_limits
*
limits
,
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const
struct
system_power_limits
*
sys_limits
,
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size_t
num_entries,
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const
struct
psys_config
*
config
);
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void
variant_init
(
void
);
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void
variant_finalize
(
void
);
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#endif
/*__BASEBOARD_VARIANTS_H__ */
variant_gpio_override_table
const struct pad_config * variant_gpio_override_table(size_t *num)
Definition:
gpio.c:198
variant_get_spd_info
void variant_get_spd_info(struct mem_spd *spd_info)
Definition:
memory.c:32
variant_generate_s0ix_hook
void variant_generate_s0ix_hook(enum s0ix_entry entry)
Definition:
mainboard.c:163
variant_finalize
void variant_finalize(void)
Definition:
mainboard.c:184
variant_fill_ssdt
void variant_fill_ssdt(const struct device *dev)
Definition:
mainboard.c:158
variant_update_psys_power_limits
void variant_update_psys_power_limits(const struct cpu_power_limits *limits, const struct system_power_limits *sys_limits, size_t num_entries, const struct psys_config *config)
Definition:
ramstage.c:96
variant_is_half_populated
bool variant_is_half_populated(void)
Definition:
memory.c:27
variant_romstage_gpio_table
const struct pad_config * variant_romstage_gpio_table(size_t *num)
Definition:
gpio.c:210
variant_update_descriptor
void variant_update_descriptor(void)
Definition:
bootblock.c:19
variant_init
void variant_init(void)
Definition:
mainboard.c:67
variant_gpio_table
const struct pad_config * variant_gpio_table(size_t *num)
Definition:
gpio.c:406
s0ix_entry
s0ix_entry
Definition:
variants.h:27
S0IX_EXIT
@ S0IX_EXIT
Definition:
variants.h:28
S0IX_ENTRY
@ S0IX_ENTRY
Definition:
variants.h:29
variant_memory_params
const struct mb_cfg * variant_memory_params(void)
Definition:
memory.c:67
variant_update_power_limits
void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries)
Definition:
ramstage.c:51
variant_devtree_update
void variant_devtree_update(void)
Definition:
mainboard.c:86
variant_update_soc_chip_config
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
Definition:
mainboard.c:62
variant_early_gpio_table
const struct pad_config * variant_early_gpio_table(size_t *num)
Definition:
gpio.c:204
variant_memory_sku
int variant_memory_sku(void)
Definition:
memory.c:74
sys_limits
const struct system_power_limits sys_limits[]
Definition:
ramstage.c:24
limits
const struct cpu_power_limits limits[]
Definition:
ramstage.c:11
config
enum board_config config
Definition:
memory.c:448
stdint.h
uint16_t
unsigned short uint16_t
Definition:
stdint.h:11
u8
uint8_t u8
Definition:
stdint.h:45
cpu_power_limits
Definition:
variants.h:39
cpu_power_limits::pl1_min_power
unsigned int pl1_min_power
Definition:
variants.h:42
cpu_power_limits::pl4_power
unsigned int pl4_power
Definition:
variants.h:46
cpu_power_limits::pl1_max_power
unsigned int pl1_max_power
Definition:
variants.h:43
cpu_power_limits::cpu_tdp
u8 cpu_tdp
Definition:
variants.h:41
cpu_power_limits::pl2_max_power
unsigned int pl2_max_power
Definition:
variants.h:45
cpu_power_limits::mchid
uint16_t mchid
Definition:
variants.h:40
cpu_power_limits::pl2_min_power
unsigned int pl2_min_power
Definition:
variants.h:44
device
Definition:
device.h:107
mb_cfg
Definition:
meminit.h:71
mem_spd
Definition:
meminit.h:37
pad_config
Definition:
gpio.h:75
psys_config
Definition:
variants.h:56
psys_config::psys_imax_ma
unsigned int psys_imax_ma
Definition:
variants.h:65
psys_config::efficiency
unsigned int efficiency
Definition:
variants.h:62
psys_config::bj_volts_mv
unsigned int bj_volts_mv
Definition:
variants.h:68
soc_intel_alderlake_config
Definition:
chip.h:175
spd_info
Definition:
spd.h:11
system_power_limits
Definition:
variants.h:49
system_power_limits::mchid
uint16_t mchid
Definition:
variants.h:50
system_power_limits::psys_pl2_power
unsigned int psys_pl2_power
Definition:
variants.h:53
system_power_limits::cpu_tdp
u8 cpu_tdp
Definition:
variants.h:51
src
mainboard
google
brya
variants
baseboard
include
baseboard
variants.h
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