9 #define MY_PCI_DEV(SEGBUS, DEV, FN) \
10 ((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12))
#define PCI_BASE_ADDRESS_1
static __always_inline uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg)
#define SIZE_OF_HSUART_RES
uintptr_t uart_platform_base(unsigned int idx)
#define MY_PCI_DEV(SEGBUS, DEV, FN)