coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip_common.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <assert.h>
4 #include <console/console.h>
5 #include <post.h>
6 #include <device/pci.h>
7 #include <soc/chip_common.h>
8 #include <soc/soc_util.h>
9 #include <soc/util.h>
10 #include <stdlib.h>
11 
12 struct pci_resource {
13  struct device *dev;
14  struct resource *res;
15  struct pci_resource *next;
16 };
17 
22 };
23 
24 typedef enum {
30 
32 {
33  if (flags & IORESOURCE_IO)
34  return RES_TYPE_IO;
35  if (flags & IORESOURCE_MEM) {
36  if (flags & IORESOURCE_PREFETCH) {
37  printk(BIOS_DEBUG, "%s:%d flags: 0x%llx\n", __func__, __LINE__, flags);
38  return RES_TYPE_PREF_MEM;
39  }
40  /* both 64-bit and 32-bit use below 4GB address space */
41  return RES_TYPE_NONPREF_MEM;
42  }
43  printk(BIOS_ERR, "Invalid resource type 0x%llx\n", flags);
44  die("");
45 }
46 
47 static bool need_assignment(uint64_t flags)
48 {
51  return false;
52  else
53  return true;
54 }
55 
56 static uint64_t get_resource_base(STACK_RES *stack, RES_TYPE res_type)
57 {
58  if (res_type == RES_TYPE_IO) {
59  assert(stack->PciResourceIoBase <= stack->PciResourceIoLimit);
60  return stack->PciResourceIoBase;
61  }
62  if (res_type == RES_TYPE_NONPREF_MEM) {
63  assert(stack->PciResourceMem32Base <= stack->PciResourceMem32Limit);
64  return stack->PciResourceMem32Base;
65  }
66  assert(stack->PciResourceMem64Base <= stack->PciResourceMem64Limit);
67  return stack->PciResourceMem64Base;
68 }
69 
70 static void set_resource_base(STACK_RES *stack, RES_TYPE res_type, uint64_t base)
71 {
72  if (res_type == RES_TYPE_IO) {
73  assert(base <= (stack->PciResourceIoLimit + 1));
74  stack->PciResourceIoBase = base;
75  } else if (res_type == RES_TYPE_NONPREF_MEM) {
76  assert(base <= (stack->PciResourceMem32Limit + 1));
77  stack->PciResourceMem32Base = base;
78  } else {
79  assert(base <= (stack->PciResourceMem64Limit + 1));
80  stack->PciResourceMem64Base = base;
81  }
82 }
83 
84 static void assign_stack_resources(struct iiostack_resource *stack_list,
85  struct device *dev, struct resource *bridge);
86 
88 {
89  DEV_FUNC_ENTER(dev);
90  struct bus *link = dev->link_list;
91 
92  printk(BIOS_SPEW, "%s:%s scanning buses under device %s\n",
93  __FILE__, __func__, dev_path(dev));
94  while (link != NULL) {
95  if (link->secondary == 0) { // scan only PSTACK buses
96  struct device *d;
97  for (d = link->children; d; d = d->sibling)
98  pci_probe_dev(d, link, d->path.pci.devfn);
99  scan_bridges(link);
100  } else {
101  pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff);
102  }
103  link = link->next;
104  }
105  DEV_FUNC_EXIT(dev);
106 }
107 
108 static void xeonsp_pci_dev_iterator(struct bus *bus,
109  void (*dev_iterator)(struct device *, void *),
110  void (*res_iterator)(struct device *, struct resource *, void *),
111  void *data)
112 {
113  struct device *curdev;
114  struct resource *res;
115 
116  /* Walk through all devices and find which resources they need. */
117  for (curdev = bus->children; curdev; curdev = curdev->sibling) {
118  struct bus *link;
119 
120  if (!curdev->enabled)
121  continue;
122 
123  if (!curdev->ops || !curdev->ops->read_resources) {
124  if (curdev->path.type != DEVICE_PATH_APIC)
125  printk(BIOS_ERR, "%s missing read_resources\n",
126  dev_path(curdev));
127  continue;
128  }
129 
130  if (dev_iterator)
131  dev_iterator(curdev, data);
132 
133  if (res_iterator) {
134  for (res = curdev->resource_list; res; res = res->next)
135  res_iterator(curdev, res, data);
136  }
137 
138  /* Read in the resources behind the current device's links. */
139  for (link = curdev->link_list; link; link = link->next)
140  xeonsp_pci_dev_iterator(link, dev_iterator, res_iterator, data);
141  }
142 }
143 
144 static void xeonsp_pci_dev_read_resources(struct device *dev, void *data)
145 {
148 }
149 
151 {
152 }
153 
154 static void xeonsp_reset_pci_op(struct device *dev, void *data)
155 {
156  if (dev->ops)
158 }
159 
161 {
162  for (int i = 0; i < info->no_of_stacks; ++i) {
163  if (bus >= info->res[i].BusBase && bus <= info->res[i].BusLimit)
164  return &info->res[i];
165  }
166  return NULL;
167 }
168 
169 static void add_res_to_stack(struct stack_dev_resource **root,
170  struct device *dev, struct resource *res)
171 {
172  struct stack_dev_resource *cur = *root;
173  while (cur) {
174  if (cur->align == res->align || cur->next == NULL) /* equal or last record */
175  break;
176  else if (cur->align > res->align) {
177  if (cur->next->align < res->align) /* need to insert new record here */
178  break;
179  cur = cur->next;
180  } else {
181  break;
182  }
183  }
184 
185  struct stack_dev_resource *nr;
186  if (!cur || cur->align != res->align) { /* need to add new record */
187  nr = malloc(sizeof(struct stack_dev_resource));
188  if (nr == 0)
189  die("assign_resource_to_stack(): out of memory.\n");
190  memset(nr, 0, sizeof(struct stack_dev_resource));
191  nr->align = res->align;
192  if (!cur) {
193  *root = nr; /* head node */
194  } else if (cur->align > nr->align) {
195  if (cur->next == NULL) {
196  cur->next = nr;
197  } else {
198  nr->next = cur->next;
199  cur->next = nr;
200  }
201  } else { /* insert in the beginning */
202  nr->next = cur;
203  *root = nr;
204  }
205  } else {
206  nr = cur;
207  }
208 
209  assert(nr != NULL && nr->align == res->align);
210 
211  struct pci_resource *npr = malloc(sizeof(struct pci_resource));
212  if (npr == NULL)
213  die("%s: out of memory.\n", __func__);
214  npr->res = res;
215  npr->dev = dev;
216  npr->next = NULL;
217 
218  if (nr->children == NULL) {
219  nr->children = npr;
220  } else {
221  struct pci_resource *pr = nr->children;
222  while (pr->next != NULL)
223  pr = pr->next;
224  pr->next = npr;
225  }
226 }
227 
228 static void reserve_dev_resources(STACK_RES *stack, RES_TYPE res_type,
229  struct stack_dev_resource *res_root, struct resource *bridge)
230 {
231  uint8_t align;
232  uint64_t orig_base, base;
233 
234  orig_base = get_resource_base(stack, res_type);
235 
236  align = 0;
237  base = orig_base;
238  int first = 1;
239  while (res_root) { /* loop through all devices grouped by alignment requirements */
240  struct pci_resource *pr = res_root->children;
241  while (pr) {
242  if (first) {
243  if (bridge) { /* takes highest alignment */
244  if (bridge->align < pr->res->align)
245  bridge->align = pr->res->align;
246  orig_base = ALIGN_UP(orig_base, 1 << bridge->align);
247  } else {
248  orig_base = ALIGN_UP(orig_base, 1 << pr->res->align);
249  }
250  base = orig_base;
251 
252  if (bridge)
253  bridge->base = base;
254  pr->res->base = base;
255  first = 0;
256  } else {
257  pr->res->base = ALIGN_UP(base, 1 << pr->res->align);
258  }
259  pr->res->limit = pr->res->base + pr->res->size - 1;
260  base = pr->res->limit + 1;
261  pr->res->flags |= (IORESOURCE_ASSIGNED);
262  pr = pr->next;
263  }
264  res_root = res_root->next;
265  }
266 
267  if (bridge) {
268  /* this bridge doesn't have any resources, will set it to default window */
269  if (first) {
270  orig_base = ALIGN_UP(orig_base, 1 << bridge->align);
271  bridge->base = orig_base;
272  base = orig_base + (1ULL << bridge->gran);
273  }
274 
275  bridge->size = ALIGN_UP(base, 1 << bridge->align) - bridge->base;
276 
277  bridge->limit = bridge->base + bridge->size - 1;
278  bridge->flags |= (IORESOURCE_ASSIGNED);
279  base = bridge->limit + 1;
280  }
281 
282  set_resource_base(stack, res_type, base);
283 }
284 
285 static void reclaim_resource_mem(struct stack_dev_resource *res_root)
286 {
287  while (res_root) { /* loop through all devices grouped by alignment requirements */
288  /* free pci_resource */
289  struct pci_resource *pr = res_root->children;
290  while (pr) {
291  struct pci_resource *dpr = pr;
292  pr = pr->next;
293  free(dpr);
294  }
295 
296  /* free stack_dev_resource */
297  struct stack_dev_resource *ddr = res_root;
298  res_root = res_root->next;
299  free(ddr);
300  }
301 }
302 
303 static void assign_bridge_resources(struct iiostack_resource *stack_list,
304  struct device *dev, struct resource *bridge)
305 {
306  struct resource *res;
307  if (!dev->enabled)
308  return;
309 
310  for (res = dev->resource_list; res; res = res->next) {
311  if (!(res->flags & IORESOURCE_BRIDGE) ||
312  (bridge && (get_res_type(bridge->flags) != get_res_type(res->flags))))
313  continue;
314 
315  assign_stack_resources(stack_list, dev, res);
316 
317  if (!bridge)
318  continue;
319 
320  /* for 1st time update, overlading IORESOURCE_ASSIGNED */
321  if (!(bridge->flags & IORESOURCE_ASSIGNED)) {
322  bridge->base = res->base;
323  bridge->limit = res->limit;
324  bridge->flags |= (IORESOURCE_ASSIGNED);
325  } else {
326  /* update bridge range from child bridge range */
327  if (res->base < bridge->base)
328  bridge->base = res->base;
329  if (res->limit > bridge->limit)
330  bridge->limit = res->limit;
331  }
332  bridge->size = (bridge->limit - bridge->base + 1);
333  }
334 }
335 
336 static void assign_stack_resources(struct iiostack_resource *stack_list,
337  struct device *dev, struct resource *bridge)
338 {
339  struct bus *bus;
340 
341  /* Read in the resources behind the current device's links. */
342  for (bus = dev->link_list; bus; bus = bus->next) {
343  struct device *curdev;
344  STACK_RES *stack;
345 
346  /* get IIO stack for this bus */
347  stack = find_stack_for_bus(stack_list, bus->secondary);
348  assert(stack != NULL);
349 
350  /* Assign resources to bridge */
351  for (curdev = bus->children; curdev; curdev = curdev->sibling)
352  assign_bridge_resources(stack_list, curdev, bridge);
353 
354  /* Pick non-bridged resources for resource allocation for each resource type */
355  RES_TYPE res_types[MAX_RES_TYPES] = {
356  RES_TYPE_IO,
359  };
360 
361  uint8_t no_res_types = MAX_RES_TYPES;
362 
363  /* if it is a bridge, only process matching bridge resource type */
364  if (bridge) {
365  res_types[0] = get_res_type(bridge->flags);
366  no_res_types = 1;
367  }
368 
369  printk(BIOS_DEBUG, "%s:%d no_res_types: %d\n", __func__, __LINE__,
370  no_res_types);
371 
372  /* Process each resource type */
373  for (int rt = 0; rt < no_res_types; ++rt) {
374  struct stack_dev_resource *res_root = NULL;
375  printk(BIOS_DEBUG, "%s:%d rt: %d\n", __func__, __LINE__, rt);
376  for (curdev = bus->children; curdev; curdev = curdev->sibling) {
377  struct resource *res;
378  printk(BIOS_DEBUG, "%s:%d dev: %s\n",
379  __func__, __LINE__, dev_path(curdev));
380  if (!curdev->enabled)
381  continue;
382 
383  for (res = curdev->resource_list; res; res = res->next) {
384  printk(BIOS_DEBUG, "%s:%d dev: %s, flags: 0x%lx\n",
385  __func__, __LINE__,
386  dev_path(curdev), res->flags);
387  if (res->size == 0 ||
388  get_res_type(res->flags) != res_types[rt] ||
389  (res->flags & IORESOURCE_BRIDGE) ||
390  !need_assignment(res->flags))
391  continue;
392  else
393  add_res_to_stack(&res_root, curdev, res);
394  }
395  }
396 
397  /* Allocate resources and update bridge range */
398  if (res_root || (bridge && !(bridge->flags & IORESOURCE_ASSIGNED))) {
399  reserve_dev_resources(stack, res_types[rt], res_root, bridge);
400  reclaim_resource_mem(res_root);
401  }
402  }
403  }
404 }
405 
407 {
408  const IIO_UDS *hob = get_iio_uds();
409 
410  return hob->PlatformData.Pci64BitResourceAllocation;
411 }
412 
413 static void xeonsp_pci_domain_read_resources(struct device *dev)
414 {
415  struct bus *link;
416 
418 
420 
421  /*
422  * Walk through all devices in this domain and read resources.
423  * Since there is no callback when read resource operation is
424  * complete for all devices, domain read resource function initiates
425  * read resources for all devices and swaps read resource operation
426  * with dummy function to avoid warning.
427  */
428  for (link = dev->link_list; link; link = link->next)
430 
431  for (link = dev->link_list; link; link = link->next)
433 
434  struct iiostack_resource stack_info = {0};
435  get_iiostack_info(&stack_info);
436  if (!is_pci64bit_alloc()) {
437  /*
438  * Split 32 bit address space between prefetchable and
439  * non-prefetchable windows
440  */
441  for (int s = 0; s < stack_info.no_of_stacks; ++s) {
442  STACK_RES *res = &stack_info.res[s];
443  uint64_t length = (res->PciResourceMem32Limit -
444  res->PciResourceMem32Base + 1)/2;
445  res->PciResourceMem64Limit = res->PciResourceMem32Limit;
446  res->PciResourceMem32Limit = (res->PciResourceMem32Base + length - 1);
447  res->PciResourceMem64Base = res->PciResourceMem32Limit + 1;
448  }
449  }
450 
451  /* assign resources */
452  assign_stack_resources(&stack_info, dev, NULL);
453 
454  DEV_FUNC_EXIT(dev);
455 }
456 
457 static void reset_resource_to_unassigned(struct device *dev, struct resource *res, void *data)
458 {
459  if ((res->flags & (IORESOURCE_IO | IORESOURCE_MEM)) &&
460  !(res->flags & (IORESOURCE_FIXED | IORESOURCE_RESERVE))) {
461  res->flags &= ~IORESOURCE_ASSIGNED;
462  }
463 }
464 
466 {
467  DEV_FUNC_ENTER(dev);
468 
469  print_resource_tree(dev, BIOS_SPEW, "Before xeonsp pci domain set resource");
470 
471  /* reset bus 0 dev resource assignment - need to change them to FSP IIOStack window */
473 
474  /* update dev resources based on IIOStack IO/Mem32/Mem64 windows */
476 
477  struct bus *link = dev->link_list;
478  while (link != NULL) {
479  assign_resources(link);
480  link = link->next;
481  }
482 
483  print_resource_tree(dev, BIOS_SPEW, "After xeonsp pci domain set resource");
484 
486 }
487 
488 /* Attach IIO stack bus numbers with dummy device to PCI DOMAIN 0000 device */
490 {
491  struct bus *iiostack_bus;
492  struct device dummy;
493  struct iiostack_resource stack_info = {0};
494 
495  DEV_FUNC_ENTER(dev);
496 
497  get_iiostack_info(&stack_info);
498  for (int s = 0; s < stack_info.no_of_stacks; ++s) {
499  /* only non zero bus no. needs to be enumerated */
500  if (stack_info.res[s].BusBase == 0)
501  continue;
502 
503  iiostack_bus = malloc(sizeof(struct bus));
504  if (iiostack_bus == NULL)
505  die("%s: out of memory.\n", __func__);
506  memset(iiostack_bus, 0, sizeof(*iiostack_bus));
507  memcpy(iiostack_bus, dev->bus, sizeof(*iiostack_bus));
508  iiostack_bus->secondary = stack_info.res[s].BusBase;
509  iiostack_bus->subordinate = stack_info.res[s].BusBase;
510  iiostack_bus->dev = NULL;
511  iiostack_bus->children = NULL;
512  iiostack_bus->next = NULL;
513  iiostack_bus->link_num = 1;
514 
515  dummy.bus = iiostack_bus;
516  dummy.path.type = DEVICE_PATH_PCI;
517  dummy.path.pci.devfn = 0;
519  if (id == 0xffffffff)
520  printk(BIOS_WARNING, "IIO Stack device %s not visible\n",
521  dev_path(&dummy));
522 
523  if (dev->link_list == NULL) {
524  dev->link_list = iiostack_bus;
525  } else {
526  struct bus *nlink = dev->link_list;
527  while (nlink->next != NULL)
528  nlink = nlink->next;
529  nlink->next = iiostack_bus;
530  }
531  }
532 
534 }
void * memcpy(void *dest, const void *src, size_t n)
Definition: memcpy.c:7
void * memset(void *dstpp, int c, size_t len)
Definition: memset.c:12
#define assert(statement)
Definition: assert.h:74
#define ALIGN_UP(x, a)
Definition: helpers.h:17
static void xeonsp_pci_domain_read_resources(struct device *dev)
Definition: chip_common.c:413
void xeonsp_pci_domain_scan_bus(struct device *dev)
Definition: chip_common.c:87
static void assign_bridge_resources(struct iiostack_resource *stack_list, struct device *dev, struct resource *bridge)
Definition: chip_common.c:303
static bool need_assignment(uint64_t flags)
Definition: chip_common.c:47
void xeonsp_pci_domain_set_resources(struct device *dev)
Definition: chip_common.c:465
static void set_resource_base(STACK_RES *stack, RES_TYPE res_type, uint64_t base)
Definition: chip_common.c:70
static void xeonsp_pci_dev_dummy_func(struct device *dev)
Definition: chip_common.c:150
static void xeonsp_pci_dev_iterator(struct bus *bus, void(*dev_iterator)(struct device *, void *), void(*res_iterator)(struct device *, struct resource *, void *), void *data)
Definition: chip_common.c:108
static void reclaim_resource_mem(struct stack_dev_resource *res_root)
Definition: chip_common.c:285
static void reserve_dev_resources(STACK_RES *stack, RES_TYPE res_type, struct stack_dev_resource *res_root, struct resource *bridge)
Definition: chip_common.c:228
static uint64_t get_resource_base(STACK_RES *stack, RES_TYPE res_type)
Definition: chip_common.c:56
static STACK_RES * find_stack_for_bus(struct iiostack_resource *info, uint8_t bus)
Definition: chip_common.c:160
RES_TYPE
Definition: chip_common.c:24
@ MAX_RES_TYPES
Definition: chip_common.c:28
@ RES_TYPE_PREF_MEM
Definition: chip_common.c:27
@ RES_TYPE_NONPREF_MEM
Definition: chip_common.c:26
@ RES_TYPE_IO
Definition: chip_common.c:25
static void reset_resource_to_unassigned(struct device *dev, struct resource *res, void *data)
Definition: chip_common.c:457
static uint8_t is_pci64bit_alloc(void)
Definition: chip_common.c:406
static void xeonsp_pci_dev_read_resources(struct device *dev, void *data)
Definition: chip_common.c:144
static void xeonsp_reset_pci_op(struct device *dev, void *data)
Definition: chip_common.c:154
static RES_TYPE get_res_type(uint64_t flags)
Definition: chip_common.c:31
static void add_res_to_stack(struct stack_dev_resource **root, struct device *dev, struct resource *res)
Definition: chip_common.c:169
static void assign_stack_resources(struct iiostack_resource *stack_list, struct device *dev, struct resource *bridge)
Definition: chip_common.c:336
void attach_iio_stacks(struct device *dev)
Definition: chip_common.c:489
#define printk(level,...)
Definition: stdlib.h:16
void __noreturn die(const char *fmt,...)
Definition: die.c:17
void scan_bridges(struct bus *bus)
Definition: device.c:383
void assign_resources(struct bus *bus)
Assign the computed resources to the devices on the bus.
Definition: device.c:268
void print_resource_tree(const struct device *root, int debug_level, const char *msg)
Definition: device_util.c:725
const char * dev_path(const struct device *dev)
Definition: device_util.c:149
static struct smmstore_params_info info
Definition: ramstage.c:12
uint64_t length
Definition: fw_cfg_if.h:1
#define DEV_FUNC_EXIT(dev)
Definition: device.h:296
#define DEV_FUNC_ENTER(dev)
Definition: device.h:295
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
Definition: pci_ops.h:58
void * malloc(size_t size)
Definition: malloc.c:53
void free(void *ptr)
Definition: malloc.c:67
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition: loglevel.h:72
#define BIOS_SPEW
BIOS_SPEW - Excessively verbose output.
Definition: loglevel.h:142
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
Definition: loglevel.h:86
@ DEVICE_PATH_PCI
Definition: path.h:9
@ DEVICE_PATH_APIC
Definition: path.h:12
static const PCI_SUBCLASS bridge[]
Definition: pci_class.c:72
#define PCI_DEVFN(slot, func)
Definition: pci_def.h:548
#define PCI_VENDOR_ID
Definition: pci_def.h:8
struct device * pci_probe_dev(struct device *dev, struct bus *bus, unsigned int devfn)
Scan a PCI bus.
Definition: pci_device.c:1183
void pci_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn)
Scan a PCI bus.
Definition: pci_device.c:1379
void pci_domain_read_resources(struct device *dev)
Definition: pci_device.c:547
ddr
Definition: raminit.h:22
static void post_log_path(const struct device *dev)
Definition: post.h:15
#define IORESOURCE_RESERVE
Definition: resource.h:30
#define IORESOURCE_MEM
Definition: resource.h:10
#define IORESOURCE_STORED
Definition: resource.h:32
#define IORESOURCE_ASSIGNED
Definition: resource.h:34
#define IORESOURCE_IO
Definition: resource.h:9
#define IORESOURCE_PREFETCH
Definition: resource.h:17
#define IORESOURCE_BRIDGE
Definition: resource.h:26
#define IORESOURCE_FIXED
Definition: resource.h:36
uintptr_t base
Definition: uart.c:17
void get_iiostack_info(struct iiostack_resource *info)
Definition: util.c:103
const IIO_UDS * get_iio_uds(void)
Definition: util.c:89
#define NULL
Definition: stddef.h:19
unsigned int uint32_t
Definition: stdint.h:14
unsigned long long uint64_t
Definition: stdint.h:17
unsigned char uint8_t
Definition: stdint.h:8
Definition: device.h:76
DEVTREE_CONST struct bus * next
Definition: device.h:80
DEVTREE_CONST struct device * children
Definition: device.h:79
unsigned char link_num
Definition: device.h:83
uint16_t subordinate
Definition: device.h:85
DEVTREE_CONST struct device * dev
Definition: device.h:78
uint16_t secondary
Definition: device.h:84
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pci_path pci
Definition: path.h:116
enum device_path_type type
Definition: path.h:114
Definition: device.h:107
DEVTREE_CONST struct device * sibling
Definition: device.h:111
struct device_path path
Definition: device.h:115
struct device_operations * ops
Definition: device.h:143
DEVTREE_CONST struct bus * bus
Definition: device.h:108
DEVTREE_CONST struct bus * link_list
Definition: device.h:139
DEVTREE_CONST struct resource * resource_list
Definition: device.h:134
unsigned int enabled
Definition: device.h:122
STACK_RES res[CONFIG_MAX_SOCKET *MAX_IIO_STACK]
Definition: util.h:21
uint8_t no_of_stacks
Definition: util.h:20
unsigned int devfn
Definition: path.h:54
struct device * dev
Definition: chip_common.c:13
struct pci_resource * next
Definition: chip_common.c:15
struct resource * res
Definition: chip_common.c:14
unsigned long flags
Definition: resource.h:49
unsigned char align
Definition: resource.h:51
resource_t limit
Definition: resource.h:47
resource_t base
Definition: resource.h:45
resource_t size
Definition: resource.h:46
DEVTREE_CONST struct resource * next
Definition: resource.h:48
struct stack_dev_resource * next
Definition: chip_common.c:21
struct pci_resource * children
Definition: chip_common.c:20
#define s(param, src_bits, pmcreg, dst_bits)