8 #include <soc/pci_devs.h>
9 #include <soc/romstage.h>
10 #include <soc/soc_chip.h>
23 m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? 0xFE : 0;
25 m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
26 m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
27 m_cfg->SaGv =
config->SaGv;
30 m_cfg->SkipMbpHob = 1;
36 if (
config->PcieRpEnable[i])
39 m_cfg->PcieRpEnableMask =
mask;
41 m_cfg->EnableC6Dram =
config->enable_c6dram;
46 m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
47 m_cfg->PcdDebugInterfaceFlags =
48 CONFIG(DRIVERS_UART_8250IO) ? 0x02 : 0x10;
51 m_cfg->VmxEnable =
CONFIG(ENABLE_VMX);
64 m_cfg->SmbusEnable =
config->SmbusEnable;
66 m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ICELAKE_DEBUG_CONSENT;
69 m_cfg->VtdDisable = 0;
__weak void mainboard_memory_init_params(FSPM_UPD *memupd)
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
#define printk(level,...)
int get_valid_prmrr_size(void)
bool is_devfn_enabled(unsigned int devfn)
static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_icelake_config *config)
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
const struct smm_save_state_ops *legacy_ops __weak