early_pch.c File Reference

#include <arch/io.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
#include <northbridge/intel/ironlake/ironlake.h>
#include <southbridge/intel/ibexpeak/pch.h>
#include <southbridge/intel/common/gpio.h>

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Functions
static void	early_gpio_init (void)
static void	pch_default_disable (void)
void	ibexpeak_setup_bars (void)
void	early_pch_init (void)

Function Documentation

early_gpio_init()

static void early_gpio_init ( void  )

static

Definition at line 12 of file early_pch.c.

References DEFAULT_GPIOBASE, GPIO_BASE, GPIO_CNTL, mainboard_gpio_map, PCH_LPC_DEV, pci_write_config32(), pci_write_config8(), and setup_pch_gpios().

Referenced by early_pch_init().

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early_pch_init()

void early_pch_init

(

void

)

Definition at line 57 of file early_pch.c.

References early_gpio_init(), early_usb_init(), enable_smbus(), IRONLAKE_MOBILE, mainboard_usb_ports, pch_default_disable(), pch_setup_cir(), and southbridge_configure_default_intmap().

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ibexpeak_setup_bars()

void ibexpeak_setup_bars

(

void

)

Definition at line 31 of file early_pch.c.

References ACPI_CNTL, ACPI_EN, BIOS_DEBUG, DEFAULT_HECIBAR, DEFAULT_PMBASE, GCS, inw(), outw(), PCH_LPC_DEV, PCI_BASE_ADDRESS_0, PCI_COMMAND, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_DEV, pci_write_config32(), pci_write_config8(), PMBASE, printk, RCBA, and RCBA32.

Referenced by ironlake_early_initialization().

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pch_default_disable()

static void pch_default_disable ( void  )

static

Definition at line 20 of file early_pch.c.

References FD, FD2, and RCBA32.

Referenced by early_pch_init().

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