chip.c File Reference

#include <bootsplash.h>
#include <fsp/api.h>
#include <acpi/acpi.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_ids.h>
#include <fsp/util.h>
#include <gpio.h>
#include <option.h>
#include <intelblocks/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcie_rp.h>
#include <intelblocks/power_limit.h>
#include <intelblocks/xdci.h>
#include <intelblocks/p2sb.h>
#include <intelpch/lockdown.h>
#include <soc/intel/common/vbt.h>
#include <soc/interrupt.h>
#include <soc/iomap.h>
#include <soc/irq.h>
#include <soc/itss.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/systemagent.h>
#include <soc/usb.h>
#include <string.h>
#include <types.h>
#include "chip.h"

Include dependency graph for chip.c:

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Functions
void	soc_init_pre_device (void *chip_info)
static void	soc_enable (struct device *dev)
void	platform_fsp_silicon_init_params_cb (FSPS_UPD *supd)
__weak void	mainboard_silicon_init_params (FSP_S_CONFIG *params)
void	soc_load_logo (FSPS_UPD *supd)

Variables
static const struct pcie_rp_group	pch_lp_rp_groups []
static const struct pcie_rp_group	pch_h_rp_groups []
static struct device_operations	pci_domain_ops
static struct device_operations	cpu_bus_ops
struct chip_operations	soc_intel_skylake_ops

Function Documentation

mainboard_silicon_init_params()

__weak void mainboard_silicon_init_params

(

FSP_S_CONFIG *

params

)

Definition at line 526 of file chip.c.

References BIOS_DEBUG, and printk.

platform_fsp_silicon_init_params_cb()

void platform_fsp_silicon_init_params_cb

(

FSPS_UPD *

supd

)

Definition at line 223 of file chip.c.

References ARRAY_SIZE, BIOS_DEBUG, CHIPSET_LOCKDOWN_FSP, config, CONFIG, config_of_soc, fill_vr_domain_config(), FSP_S_CONFIG, get_lockdown_config(), get_uint_option(), GFXVT_BASE_ADDRESS, is_devfn_enabled(), mainboard_silicon_init_params(), memcpy(), memset(), OC_SKIP, params, PAVP, PCH_DEVFN_CIO, PCH_DEVFN_CSE_3, PCH_DEVFN_EMMC, PCH_DEVFN_GBE, PCH_DEVFN_HDA, PCH_DEVFN_ISH, PCH_DEVFN_SATA, PCH_DEVFN_SDCARD, PCH_DEVFN_SPI, PCH_DEVFN_THERMAL, PCH_DEVFN_USBOTG, printk, soc_power_limits_config::psys_pmax, SA_DEVFN_CHAP, SA_DEVFN_GMM, SA_DEVFN_IGD, SA_DEVFN_IMGU, SA_DEVFN_TS, SERIRQ_CONTINUOUS, SERIRQ_OFF, soc_irq_settings(), soc_vtd_enabled(), vbt_data, vbt_get(), VTVC0_BASE_ADDRESS, and xdci_can_enable().

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soc_enable()

static void soc_enable ( struct device *  dev )

static

Definition at line 205 of file chip.c.

References block_gpio_enable(), cpu_bus_ops, DEVICE_PATH_CPU_CLUSTER, DEVICE_PATH_DOMAIN, DEVICE_PATH_GPIO, device::ops, device::path, pci_domain_ops, and device_path::type.

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soc_init_pre_device()

void soc_init_pre_device

(

void *

chip_info

)

Definition at line 162 of file chip.c.

soc_load_logo()

void soc_load_logo

(

FSPS_UPD *

supd

)

Definition at line 532 of file chip.c.

References bmp_load_logo().

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Variable Documentation

cpu_bus_ops

struct device_operations cpu_bus_ops

static

Initial value:

= {
        .read_resources   = noop_read_resources,
        .set_resources    = noop_set_resources,
 
 
 
}

Definition at line 162 of file chip.c.

pch_h_rp_groups

const struct pcie_rp_group pch_h_rp_groups[]

static

Initial value:

= {
        { .slot = PCH_DEV_SLOT_PCIE,    .count = 8, .lcap_port_base = 1 },
        { .slot = PCH_DEV_SLOT_PCIE_1,  .count = 8, .lcap_port_base = 1 },
        
        { .slot = PCH_DEV_SLOT_PCIE_2,  .count = 8, .lcap_port_base = 1 },
        { 0 }
}

Definition at line 1 of file chip.c.

pch_lp_rp_groups

const struct pcie_rp_group pch_lp_rp_groups[]

static

Initial value:

= {
        { .slot = PCH_DEV_SLOT_PCIE,    .count = 8, .lcap_port_base = 1 },
        { .slot = PCH_DEV_SLOT_PCIE_1,  .count = 4, .lcap_port_base = 1 },
        { 0 }
}

Definition at line 1 of file chip.c.

pci_domain_ops

struct device_operations pci_domain_ops

static

Initial value:

= {
        .read_resources   = &pci_domain_read_resources,
        .set_resources    = &pci_domain_set_resources,
        .scan_bus         = &pci_domain_scan_bus,
 
 
 
}

Definition at line 162 of file chip.c.

Referenced by soc_enable().

soc_intel_skylake_ops

struct chip_operations soc_intel_skylake_ops

Initial value:

= {
 
        .enable_dev     = &soc_enable,
        .init           = &soc_init_pre_device,
}

Definition at line 205 of file chip.c.