coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <southbridge/intel/common/pciehp.h>
#include <assert.h>
#include "chip.h"
#include "pch.h"
Go to the source code of this file.
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static const char * | pch_pcie_acpi_name (const struct device *dev) |
static void | pch_pcie_pm_early (struct device *dev) |
static void | pch_pcie_pm_late (struct device *dev) |
static void | pci_init (struct device *dev) |
static void | pch_pcie_enable (struct device *dev) |
static void | pch_pciexp_scan_bridge (struct device *dev) |
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static struct device_operations | device_ops |
static const unsigned short | pci_device_ids [] |
static const struct pci_driver pch_pcie | __pci_driver |
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Definition at line 16 of file pcie.c.
References ASSERT, pci_path::devfn, NULL, device::path, device_path::pci, PCI_FUNC, and PCI_SLOT.
Definition at line 212 of file pcie.c.
References pch_pcie_pm_early().
Definition at line 36 of file pcie.c.
References CIR9, pci_path::devfn, device::path, device_path::pci, PCI_FUNC, pci_or_config32(), pci_read_config32(), pci_read_config8(), pci_write_config32(), pci_write_config8(), RCBA32, and RPC.
Referenced by pch_pcie_enable().
Definition at line 141 of file pcie.c.
References device::chip_info, config, pci_path::devfn, device::path, device_path::pci, PCI_FUNC, pci_or_config32(), pci_read_config32(), pci_update_config32(), pci_write_config32(), and PCIE_ASPM_BOTH.
Definition at line 180 of file pcie.c.
References BIOS_DEBUG, device::chip_info, config, pci_path::devfn, device::path, device_path::pci, pci_and_config16(), PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_PARITY, PCI_COMMAND, PCI_COMMAND_MASTER, PCI_FUNC, pci_or_config16(), pci_or_config32(), pci_read_config16(), pci_write_config16(), pci_write_config8(), and printk.
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