coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef CFG_PCH_GPIO_H
4 #define CFG_PCH_GPIO_H
5 
6 #include <soc/gpio.h>
7 
8 /* GPIO configuration table for C627 Lewisburg PCH */
9 static const struct pad_config gpio_table[] = {
10  /* ------- GPIO Community 0 ------- */
11  /* ------- GPIO Group GPP_A ------- */
12  /* GPP_A0 - ESPI_ALERT1# */
13  PAD_CFG_NF(GPP_A0, NONE, DEEP, NF3),
14  /* GPP_A1 - ESPI_IO0 */
15  PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF3),
16  /* GPP_A2 - ESPI_IO1 */
17  PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF3),
18  /* GPP_A3 - ESPI_IO2 */
19  PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF3),
20  /* GPP_A4 - ESPI_IO3 */
21  PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF3),
22  /* GPP_A5 - ESPI_CS0# */
23  PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF3),
24  /* GPP_A6 - ESPI_CS1# */
25  PAD_CFG_NF(GPP_A6, NONE, DEEP, NF3),
26  /* GPP_A7 - ESPI_ALERT0# */
27  PAD_CFG_NF(GPP_A7, NONE, DEEP, NF3),
28  /* GPP_A8 - CLKRUN# */
29  PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
30  /* GPP_A9 - ESPI_CLK */
31  PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF3),
32  /* GPP_A10 - CLKOUT_LPC1 */
33  PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
34  /* GPP_A11 - GPIO */
35  PAD_CFG_GPI_TRIG_OWN(GPP_A11, NONE, DEEP, OFF, DRIVER),
36  /* GPP_A12 - GPIO */
37  PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT),
38  /* GPP_A13 - GPIO */
39  PAD_CFG_GPO(GPP_A13, 0, DEEP),
40  /* GPP_A14 - ESPI_RESET# */
41  PAD_CFG_NF(GPP_A14, NONE, DEEP, NF3),
42  /* GPP_A15 - GPIO */
43  PAD_CFG_GPI_TRIG_OWN(GPP_A15, NONE, DEEP, OFF, DRIVER),
44  /* GPP_A16 - GPIO */
45  PAD_CFG_GPO(GPP_A16, 1, DEEP),
46  /* GPP_A17 - GPIO */
47  PAD_CFG_GPI_TRIG_OWN(GPP_A17, NONE, RSMRST, OFF, ACPI),
48  /* GPP_A18 - GPIO */
49  PAD_CFG_GPI_TRIG_OWN(GPP_A18, NONE, RSMRST, OFF, ACPI),
50  /* GPP_A19 - RESERVED */
51  /* GPP_A20 - GPIO */
52  PAD_CFG_GPI_TRIG_OWN(GPP_A20, NONE, RSMRST, OFF, ACPI),
53  /* GPP_A21 - GPIO */
54  PAD_CFG_GPI_TRIG_OWN(GPP_A21, NONE, RSMRST, OFF, ACPI),
55  /* GPP_A22 - GPIO */
56  PAD_CFG_GPI_TRIG_OWN(GPP_A22, NONE, RSMRST, OFF, ACPI),
57  /* GPP_A23 - GPIO */
58  PAD_CFG_GPI_TRIG_OWN(GPP_A23, NONE, RSMRST, OFF, ACPI),
59 
60  /* ------- GPIO Group GPP_B ------- */
61  /* GPP_B0 - CORE_VID0 */
62  PAD_CFG_NF(GPP_B0, NONE, RSMRST, NF1),
63  /* GPP_B1 - CORE_VID1 */
64  PAD_CFG_NF(GPP_B1, NONE, RSMRST, NF1),
65  /* GPP_B2 - GPIO */
66  PAD_CFG_GPI_TRIG_OWN(GPP_B2, NONE, RSMRST, OFF, ACPI),
67  /* GPP_B3 - GPIO */
68  PAD_CFG_GPI_TRIG_OWN(GPP_B3, NONE, RSMRST, OFF, ACPI),
69  /* GPP_B4 - GPIO */
70  PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, RSMRST, OFF, ACPI),
71  /* GPP_B5 - GPIO */
72  PAD_CFG_GPI_TRIG_OWN(GPP_B5, NONE, RSMRST, OFF, ACPI),
73  /* GPP_B6 - GPIO */
74  PAD_CFG_GPI_TRIG_OWN(GPP_B6, NONE, RSMRST, OFF, ACPI),
75  /* GPP_B7 - GPIO */
76  PAD_CFG_GPI_TRIG_OWN(GPP_B7, NONE, RSMRST, OFF, ACPI),
77  /* GPP_B8 - GPIO */
78  PAD_CFG_GPI_TRIG_OWN(GPP_B8, NONE, RSMRST, OFF, ACPI),
79  /* GPP_B9 - GPIO */
80  PAD_CFG_GPI_TRIG_OWN(GPP_B9, NONE, RSMRST, OFF, ACPI),
81  /* GPP_B10 - GPIO */
82  PAD_CFG_GPI_TRIG_OWN(GPP_B10, NONE, RSMRST, OFF, ACPI),
83  /* GPP_B11 - RESERVED */
84  /* GPP_B12 - GPIO */
85  PAD_CFG_GPI_TRIG_OWN(GPP_B12, NONE, RSMRST, OFF, ACPI),
86  /* GPP_B13 - PLTRST# */
87  PAD_CFG_NF(GPP_B13, NONE, RSMRST, NF1),
88  /* GPP_B14 - SPKR */
89  PAD_CFG_NF(GPP_B14, NONE, RSMRST, NF1),
90  /* GPP_B15 - GPIO */
91  PAD_CFG_GPI_TRIG_OWN(GPP_B15, NONE, RSMRST, OFF, ACPI),
92  /* GPP_B16 - GPIO */
93  PAD_CFG_GPI_TRIG_OWN(GPP_B16, NONE, RSMRST, OFF, ACPI),
94  /* GPP_B17 - GPIO */
95  PAD_CFG_GPI_TRIG_OWN(GPP_B17, NONE, RSMRST, OFF, ACPI),
96  /* GPP_B18 - GPIO */
97  PAD_CFG_GPI_TRIG_OWN(GPP_B18, NONE, RSMRST, OFF, ACPI),
98  /* GPP_B19 - GPIO */
99  PAD_CFG_GPI_TRIG_OWN(GPP_B19, NONE, RSMRST, OFF, ACPI),
100  /* GPP_B20 - GPIO */
101  PAD_CFG_GPO(GPP_B20, 0, RSMRST),
102  /* GPP_B21 - GPIO */
103  PAD_CFG_GPI_TRIG_OWN(GPP_B21, NONE, RSMRST, OFF, ACPI),
104  /* GPP_B22 - GPIO */
105  PAD_CFG_GPI_TRIG_OWN(GPP_B22, NONE, RSMRST, OFF, ACPI),
106  /* GPP_B23 - PCHHOT# */
107  PAD_CFG_NF(GPP_B23, NONE, RSMRST, NF2),
108 
109  /* ------- GPIO Group GPP_F ------- */
110  /* GPP_F0 - SATAXPCIE3 */
111  PAD_CFG_NF(GPP_F0, NONE, RSMRST, NF1),
112  /* GPP_F1 - SATAXPCIE4 */
113  PAD_CFG_NF(GPP_F1, NONE, RSMRST, NF1),
114  /* GPP_F2 - SATAXPCIE5 */
115  PAD_CFG_NF(GPP_F2, NONE, RSMRST, NF1),
116  /* GPP_F3 - SATAXPCIE6 */
117  PAD_CFG_NF(GPP_F3, NONE, RSMRST, NF1),
118  /* GPP_F4 - SATAXPCIE7 */
119  PAD_CFG_NF(GPP_F4, NONE, RSMRST, NF1),
120  /* GPP_F5 - GPIO */
121  PAD_CFG_GPI_TRIG_OWN(GPP_F5, NONE, RSMRST, OFF, ACPI),
122  /* GPP_F6 - GPIO */
123  PAD_CFG_GPO(GPP_F6, 0, RSMRST),
124  /* GPP_F7 - GPIO */
125  PAD_CFG_GPO(GPP_F7, 0, RSMRST),
126  /* GPP_F8 - GPIO */
127  PAD_CFG_GPO(GPP_F8, 0, RSMRST),
128  /* GPP_F9 - GPIO */
129  PAD_CFG_GPI_TRIG_OWN(GPP_F9, NONE, RSMRST, OFF, ACPI),
130  /* GPP_F10 - SATA_SCLOCK */
131  PAD_CFG_NF(GPP_F10, NONE, RSMRST, NF1),
132  /* GPP_F11 - SATA_SLOAD */
133  PAD_CFG_NF(GPP_F11, NONE, RSMRST, NF1),
134  /* GPP_F12 - SATA_SDATAOUT1 */
135  PAD_CFG_NF(GPP_F12, NONE, RSMRST, NF1),
136  /* GPP_F13 - SATA_SDATAOUT2 */
137  PAD_CFG_NF(GPP_F13, NONE, RSMRST, NF1),
138  /* GPP_F14 - SSATA_LED# */
139  PAD_CFG_NF(GPP_F14, NONE, RSMRST, NF3),
140  /* GPP_F15 - USB_OC4# */
141  PAD_CFG_NF(GPP_F15, NONE, RSMRST, NF1),
142  /* GPP_F16 - USB_OC5# */
143  PAD_CFG_NF(GPP_F16, NONE, RSMRST, NF1),
144  /* GPP_F17 - USB_OC6# */
145  PAD_CFG_NF(GPP_F17, NONE, RSMRST, NF1),
146  /* GPP_F18 - USB_OC7# */
147  PAD_CFG_NF(GPP_F18, NONE, RSMRST, NF1),
148  /* GPP_F19 - LAN_SMBCLK */
149  PAD_CFG_NF(GPP_F19, NONE, RSMRST, NF1),
150  /* GPP_F20 - LAN_SMBDATA */
151  PAD_CFG_NF(GPP_F20, NONE, RSMRST, NF1),
152  /* GPP_F21 - GPIO */
153  PAD_CFG_GPI_TRIG_OWN(GPP_F21, NONE, RSMRST, OFF, ACPI),
154  /* GPP_F22 - SSATA_SCLOCK */
155  PAD_CFG_NF(GPP_F22, NONE, RSMRST, NF3),
156  /* GPP_F23 - SSATA_SLOAD */
157  PAD_CFG_NF(GPP_F23, NONE, RSMRST, NF3),
158 
159  /* ------- GPIO Community 1 ------- */
160  /* ------- GPIO Group GPP_C ------- */
161  /* GPP_C0 - RESERVED */
162  /* GPP_C1 - RESERVED */
163  /* GPP_C2 - GPIO */
164  PAD_CFG_GPI(GPP_C2, NONE, RSMRST),
165  /* GPP_C3 - RESERVED */
166  /* GPP_C4 - RESERVED */
167  /* GPP_C5 - SML0ALERT# */
168  PAD_CFG_NF(GPP_C5, NONE, RSMRST, NF1),
169  /* GPP_C6 - RESERVED */
170  /* GPP_C7 - RESERVED */
171  /* GPP_C8 - GPIO */
172  PAD_CFG_GPI_TRIG_OWN(GPP_C8, NONE, RSMRST, OFF, ACPI),
173  /* GPP_C9 - GPIO */
174  PAD_CFG_GPI_TRIG_OWN(GPP_C9, NONE, RSMRST, OFF, DRIVER),
175  /* GPP_C10 - GPIO */
177  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
179  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
180  /* GPP_C11 - GPIO */
181  PAD_CFG_GPI_TRIG_OWN(GPP_C11, NONE, RSMRST, OFF, ACPI),
182  /* GPP_C12 - GPIO */
183  PAD_CFG_GPI_TRIG_OWN(GPP_C12, NONE, RSMRST, OFF, ACPI),
184  /* GPP_C13 - GPIO */
185  PAD_CFG_GPI_TRIG_OWN(GPP_C13, NONE, RSMRST, OFF, ACPI),
186  /* GPP_C14 - GPIO */
187  PAD_CFG_GPI_TRIG_OWN(GPP_C14, NONE, RSMRST, OFF, ACPI),
188  /* GPP_C15 - GPIO */
189  PAD_CFG_GPI_TRIG_OWN(GPP_C15, NONE, RSMRST, OFF, ACPI),
190  /* GPP_C16 - GPIO */
191  PAD_CFG_GPI_TRIG_OWN(GPP_C16, NONE, RSMRST, OFF, ACPI),
192  /* GPP_C17 - GPIO */
193  PAD_CFG_GPI_TRIG_OWN(GPP_C17, NONE, RSMRST, OFF, ACPI),
194  /* GPP_C18 - GPIO */
195  PAD_CFG_GPI_TRIG_OWN(GPP_C18, NONE, RSMRST, OFF, ACPI),
196  /* GPP_C19 - GPIO */
197  PAD_CFG_GPO(GPP_C19, 0, RSMRST),
198  /* GPP_C20 - RESERVED */
199  /* GPP_C21 - GPIO */
200  PAD_CFG_GPO(GPP_C21, 0, RSMRST),
201  /* GPP_C22 - GPIO */
202  PAD_CFG_GPI_TRIG_OWN(GPP_C22, NONE, RSMRST, OFF, ACPI),
203  /* GPP_C23 - GPIO */
204  PAD_CFG_GPI_TRIG_OWN(GPP_C23, NONE, RSMRST, OFF, ACPI),
205 
206  /* ------- GPIO Group GPP_D ------- */
207  /* GPP_D0 - GPIO */
208  PAD_CFG_GPI_TRIG_OWN(GPP_D0, NONE, RSMRST, OFF, ACPI),
209  /* GPP_D1 - GPIO */
210  PAD_CFG_GPO(GPP_D1, 0, RSMRST),
211  /* GPP_D2 - GPIO */
212  PAD_CFG_GPO(GPP_D2, 0, RSMRST),
213  /* GPP_D3 - GPIO */
214  PAD_CFG_GPI_TRIG_OWN(GPP_D3, NONE, RSMRST, OFF, ACPI),
215  /* GPP_D4 - GPIO */
216  PAD_CFG_GPO(GPP_D4, 1, RSMRST),
217  /* GPP_D5 - GPIO */
218  PAD_CFG_GPI_TRIG_OWN(GPP_D5, NONE, RSMRST, OFF, ACPI),
219  /* GPP_D6 - GPIO */
220  PAD_CFG_GPI_TRIG_OWN(GPP_D6, NONE, RSMRST, OFF, DRIVER),
221  /* GPP_D7 - GPIO */
222  PAD_CFG_GPI_TRIG_OWN(GPP_D7, NONE, RSMRST, OFF, ACPI),
223  /* GPP_D8 - GPIO */
224  PAD_CFG_GPI_TRIG_OWN(GPP_D8, NONE, RSMRST, OFF, ACPI),
225  /* GPP_D9 - GPIO */
226  PAD_CFG_GPI_TRIG_OWN(GPP_D9, NONE, RSMRST, OFF, ACPI),
227  /* GPP_D10 - SSATA_DEVSLP4 */
228  PAD_CFG_NF(GPP_D10, NONE, RSMRST, NF3),
229  /* GPP_D11 - GPIO */
230  PAD_CFG_GPI_TRIG_OWN(GPP_D11, NONE, RSMRST, OFF, ACPI),
231  /* GPP_D12 - SSATA_SDATAOUT1 */
232  PAD_CFG_NF(GPP_D12, NONE, RSMRST, NF3),
233  /* GPP_D13 - SML0BCLK_IE */
234  PAD_CFG_NF(GPP_D13, NONE, RSMRST, NF3),
235  /* GPP_D14 - SML0BDATA_IE */
236  PAD_CFG_NF(GPP_D14, NONE, RSMRST, NF3),
237  /* GPP_D15 - SSATA_SDATAOUT0 */
238  PAD_CFG_NF(GPP_D15, NONE, RSMRST, NF3),
239  /* GPP_D16 - GPIO */
240  PAD_CFG_GPO(GPP_D16, 0, RSMRST),
241  /* GPP_D17 - GPIO */
242  PAD_CFG_GPO(GPP_D17, 0, RSMRST),
243  /* GPP_D18 - GPIO */
244  PAD_CFG_GPI_TRIG_OWN(GPP_D18, NONE, RSMRST, OFF, ACPI),
245  /* GPP_D19 - GPIO */
246  PAD_CFG_GPO(GPP_D19, 0, RSMRST),
247  /* GPP_D20 - GPIO */
248  PAD_CFG_GPI_TRIG_OWN(GPP_D20, NONE, RSMRST, OFF, ACPI),
249  /* GPP_D21 - GPIO */
250  PAD_CFG_GPI_TRIG_OWN(GPP_D21, NONE, RSMRST, OFF, ACPI),
251  /* GPP_D22 - GPIO */
252  PAD_CFG_GPI_TRIG_OWN(GPP_D22, NONE, RSMRST, OFF, ACPI),
253  /* GPP_D23 - GPIO */
254  PAD_CFG_GPI_TRIG_OWN(GPP_D23, NONE, RSMRST, OFF, ACPI),
255 
256  /* ------- GPIO Group GPP_E ------- */
257  /* GPP_E0 - SATAXPCIE0 */
258  PAD_CFG_NF(GPP_E0, NONE, RSMRST, NF1),
259  /* GPP_E1 - SATAXPCIE1 */
260  PAD_CFG_NF(GPP_E1, NONE, RSMRST, NF1),
261  /* GPP_E2 - SATAXPCIE2 */
262  PAD_CFG_NF(GPP_E2, NONE, RSMRST, NF1),
263  /* GPP_E3 - CPU_GP0 */
264  PAD_CFG_NF(GPP_E3, NONE, RSMRST, NF1),
265  /* GPP_E4 - GPIO */
266  PAD_CFG_GPI_TRIG_OWN(GPP_E4, NONE, RSMRST, OFF, ACPI),
267  /* GPP_E5 - GPIO */
268  PAD_CFG_GPI_TRIG_OWN(GPP_E5, NONE, RSMRST, OFF, ACPI),
269  /* GPP_E6 - GPIO */
270  PAD_CFG_GPI_TRIG_OWN(GPP_E6, NONE, RSMRST, OFF, ACPI),
271  /* GPP_E7 - GPIO */
272  PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, INVERT),
273  /* GPP_E8 - SATA_LED# */
274  PAD_CFG_NF(GPP_E8, NONE, RSMRST, NF1),
275  /* GPP_E9 - USB_OC0# */
276  PAD_CFG_NF(GPP_E9, NONE, RSMRST, NF1),
277  /* GPP_E10 - USB_OC1# */
278  PAD_CFG_NF(GPP_E10, NONE, RSMRST, NF1),
279  /* GPP_E11 - USB_OC2# */
280  PAD_CFG_NF(GPP_E11, NONE, RSMRST, NF1),
281  /* GPP_E12 - USB_OC3# */
282  PAD_CFG_NF(GPP_E12, NONE, RSMRST, NF1),
283 
284  /* ------- GPIO Community 2 ------- */
285  /* -------- GPIO Group GPD -------- */
286  /* GPD0 - RESERVED */
287  /* GPD1 - ACPRESENT */
288  PAD_CFG_NF(GPD1, NONE, RSMRST, NF1),
289  /* GPD2 - GBE_WAKE# */
290  PAD_CFG_NF(GPD2, NONE, RSMRST, NF1),
291  /* GPD3 - PWRBTN# */
292  PAD_CFG_NF(GPD3, NONE, RSMRST, NF1),
293  /* GPD4 - SLP_S3# */
294  PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),
295  /* GPD5 - SLP_S4# */
296  PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),
297  /* GPD6 - SLP_A# */
298  PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),
299  /* GPD7 - GPIO */
300  PAD_CFG_GPI_TRIG_OWN(GPD7, NONE, RSMRST, OFF, ACPI),
301  /* GPD8 - GPIO */
302  PAD_CFG_GPI_TRIG_OWN(GPD8, NONE, RSMRST, OFF, ACPI),
303  /* GPD9 - GPIO */
304  PAD_CFG_GPI_TRIG_OWN(GPD9, NONE, RSMRST, OFF, ACPI),
305  /* GPD10 - SLP_S5# */
306  PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),
307  /* GPD11 - GBEPHY */
308  PAD_CFG_NF(GPD11, NONE, RSMRST, NF1),
309 
310  /* ------- GPIO Community 3 ------- */
311  /* ------- GPIO Group GPP_I ------- */
312  /* GPP_I0 - LAN_TDO */
313  PAD_CFG_NF(GPP_I0, NONE, RSMRST, NF2),
314  /* GPP_I1 - LAN_TCK */
315  PAD_CFG_NF(GPP_I1, NONE, RSMRST, NF2),
316  /* GPP_I2 - LAN_TMS */
317  PAD_CFG_NF(GPP_I2, NONE, RSMRST, NF2),
318  /* GPP_I3 - LAN_TDI */
319  PAD_CFG_NF(GPP_I3, NONE, RSMRST, NF2),
320  /* GPP_I4 - GPIO */
322  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
324  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
325  /* GPP_I5 - GPIO */
326  PAD_CFG_GPO(GPP_I5, 0, RSMRST),
327  /* GPP_I6 - GPIO */
328  PAD_CFG_GPI_TRIG_OWN(GPP_I6, NONE, RSMRST, OFF, ACPI),
329  /* GPP_I7 - LAN_TRST_IN */
330  PAD_CFG_NF(GPP_I7, NONE, RSMRST, NF2),
331  /* GPP_I8 - PCI_DIS */
332  PAD_CFG_NF(GPP_I8, NONE, RSMRST, NF2),
333  /* GPP_I9 - LAN_DIS */
334  PAD_CFG_NF(GPP_I9, NONE, RSMRST, NF2),
335  /* GPP_I10 - GPIO */
336  PAD_CFG_GPI_TRIG_OWN(GPP_I10, NONE, RSMRST, OFF, ACPI),
337 
338  /* ------- GPIO Community 4 ------- */
339  /* ------- GPIO Group GPP_J ------- */
340  /* GPP_J0 - GPIO */
341  PAD_CFG_GPO(GPP_J0, 0, RSMRST),
342  /* GPP_J1 - GPIO */
343  PAD_CFG_GPO(GPP_J1, 0, RSMRST),
344  /* GPP_J2 - GPIO */
345  PAD_CFG_GPO(GPP_J2, 0, RSMRST),
346  /* GPP_J3 - GPIO */
347  PAD_CFG_GPO(GPP_J3, 0, RSMRST),
348  /* GPP_J4 - GPIO */
349  PAD_CFG_GPO(GPP_J4, 0, RSMRST),
350  /* GPP_J5 - GPIO */
351  PAD_CFG_GPO(GPP_J5, 0, RSMRST),
352  /* GPP_J6 - GPIO */
353  PAD_CFG_GPO(GPP_J6, 0, RSMRST),
354  /* GPP_J7 - GPIO */
355  PAD_CFG_GPO(GPP_J7, 0, RSMRST),
356  /* GPP_J8 - GPIO */
357  PAD_CFG_GPO(GPP_J8, 0, RSMRST),
358  /* GPP_J9 - GPIO */
359  PAD_CFG_GPO(GPP_J9, 0, RSMRST),
360  /* GPP_J10 - GPIO */
361  PAD_CFG_GPO(GPP_J10, 0, RSMRST),
362  /* GPP_J11 - GPIO */
363  PAD_CFG_GPO(GPP_J11, 0, RSMRST),
364  /* GPP_J12 - GPIO */
365  PAD_CFG_GPO(GPP_J12, 0, RSMRST),
366  /* GPP_J13 - GPIO */
368  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
370  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
371  /* GPP_J14 - GPIO */
372  PAD_CFG_GPO(GPP_J14, 0, RSMRST),
373  /* GPP_J15 - GPIO */
375  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
377  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
378  /* GPP_J16 - GPIO */
379  PAD_CFG_GPO(GPP_J16, 0, RSMRST),
380  /* GPP_J17 - GPIO */
381  PAD_CFG_GPI_TRIG_OWN(GPP_J17, NONE, RSMRST, OFF, ACPI),
382  /* GPP_J18 - GPIO */
383  PAD_CFG_GPO(GPP_J18, 0, RSMRST),
384  /* GPP_J19 - GPIO */
385  PAD_CFG_GPI_TRIG_OWN(GPP_J19, NONE, RSMRST, OFF, ACPI),
386  /* GPP_J20 - GPIO */
387  PAD_CFG_GPO(GPP_J20, 0, RSMRST),
388  /* GPP_J21 - GPIO */
389  PAD_CFG_GPI_TRIG_OWN(GPP_J21, NONE, RSMRST, OFF, ACPI),
390  /* GPP_J22 - GPIO */
391  PAD_CFG_GPO(GPP_J22, 0, RSMRST),
392  /* GPP_J23 - GPIO */
393  PAD_CFG_GPI_TRIG_OWN(GPP_J23, NONE, RSMRST, OFF, ACPI),
394 
395  /* ------- GPIO Group GPP_K ------- */
396  /* GPP_K0 - LAN_NCSI_CLK_IN */
397  PAD_CFG_NF(GPP_K0, NONE, RSMRST, NF1),
398  /* GPP_K1 - LAN_NCSI_TXD0 */
399  PAD_CFG_NF(GPP_K1, NONE, RSMRST, NF1),
400  /* GPP_K2 - LAN_NCSI_TXD1 */
401  PAD_CFG_NF(GPP_K2, NONE, RSMRST, NF1),
402  /* GPP_K3 - LAN_NCSI_TX_EN */
403  PAD_CFG_NF(GPP_K3, NONE, RSMRST, NF1),
404  /* GPP_K4 - LAN_NCSI_CRS_DV */
405  PAD_CFG_NF(GPP_K4, NONE, RSMRST, NF1),
406  /* GPP_K5 - LAN_NCSI_RXD0 */
407  PAD_CFG_NF(GPP_K5, NONE, RSMRST, NF1),
408  /* GPP_K6 - LAN_NCSI_RXD1 */
409  PAD_CFG_NF(GPP_K6, NONE, RSMRST, NF1),
410  /* GPP_K7 - RESERVED */
411  PAD_CFG_NF(GPP_K7, NONE, RSMRST, NF1),
412  /* GPP_K8 - LAN_NCSI_ARB_IN */
413  PAD_CFG_NF(GPP_K8, NONE, RSMRST, NF1),
414  /* GPP_K9 - LAN_NCSI_ARB_OUT */
415  PAD_CFG_NF(GPP_K9, NONE, RSMRST, NF1),
416  /* GPP_K10 - PE_RST# */
417  PAD_CFG_NF(GPP_K10, NONE, RSMRST, NF1),
418 
419  /* ------- GPIO Community 5 ------- */
420  /* ------- GPIO Group GPP_G ------- */
421  /* GPP_G0 - GPIO */
422  PAD_CFG_GPI_TRIG_OWN(GPP_G0, NONE, RSMRST, OFF, ACPI),
423  /* GPP_G1 - GPIO */
424  PAD_CFG_GPI_TRIG_OWN(GPP_G1, NONE, RSMRST, OFF, ACPI),
425  /* GPP_G2 - GPIO */
426  PAD_CFG_GPI_TRIG_OWN(GPP_G2, NONE, RSMRST, OFF, ACPI),
427  /* GPP_G3 - GPIO */
428  PAD_CFG_GPI_TRIG_OWN(GPP_G3, NONE, RSMRST, OFF, ACPI),
429  /* GPP_G4 - GPIO */
430  PAD_CFG_GPI_TRIG_OWN(GPP_G4, NONE, RSMRST, OFF, ACPI),
431  /* GPP_G5 - GPIO */
432  PAD_CFG_GPI_TRIG_OWN(GPP_G5, NONE, RSMRST, OFF, ACPI),
433  /* GPP_G6 - GPIO */
434  PAD_CFG_GPI_TRIG_OWN(GPP_G6, NONE, RSMRST, OFF, ACPI),
435  /* GPP_G7 - GPIO */
436  PAD_CFG_GPI_TRIG_OWN(GPP_G7, NONE, RSMRST, OFF, ACPI),
437  /* GPP_G8 - GPIO */
438  PAD_CFG_GPI_TRIG_OWN(GPP_G8, NONE, RSMRST, OFF, ACPI),
439  /* GPP_G9 - GPIO */
440  PAD_CFG_GPI_TRIG_OWN(GPP_G9, NONE, RSMRST, OFF, ACPI),
441  /* GPP_G10 - GPIO */
442  PAD_CFG_GPI_TRIG_OWN(GPP_G10, NONE, RSMRST, OFF, ACPI),
443  /* GPP_G11 - GPIO */
444  PAD_CFG_GPI_TRIG_OWN(GPP_G11, NONE, RSMRST, OFF, ACPI),
445  /* GPP_G12 - GPIO */
446  PAD_CFG_GPI_TRIG_OWN(GPP_G12, NONE, RSMRST, OFF, ACPI),
447  /* GPP_G13 - GPIO */
448  PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, RSMRST, OFF, ACPI),
449  /* GPP_G14 - GPIO */
450  PAD_CFG_GPI_TRIG_OWN(GPP_G14, NONE, RSMRST, OFF, ACPI),
451  /* GPP_G15 - GPIO */
452  PAD_CFG_GPI_TRIG_OWN(GPP_G15, NONE, RSMRST, OFF, ACPI),
453  /* GPP_G16 - GPIO */
454  PAD_CFG_GPI_TRIG_OWN(GPP_G16, NONE, RSMRST, OFF, ACPI),
455  /* GPP_G17 - ADR_COMPLETE */
456  PAD_CFG_NF(GPP_G17, NONE, RSMRST, NF1),
457  /* GPP_G18 - NMI# */
458  PAD_CFG_NF(GPP_G18, NONE, RSMRST, NF1),
459  /* GPP_G19 - SMI# */
460  PAD_CFG_NF(GPP_G19, NONE, RSMRST, NF1),
461  /* GPP_G20 - RESERVED */
462  /* GPP_G21 - GPIO */
463  PAD_CFG_GPI_TRIG_OWN(GPP_G21, NONE, RSMRST, OFF, ACPI),
464  /* GPP_G22 - n/a */
465  PAD_CFG_NF(GPP_G22, NONE, RSMRST, NF3),
466  /* GPP_G23 - GPIO */
467  PAD_CFG_GPI_TRIG_OWN(GPP_G23, NONE, RSMRST, OFF, ACPI),
468 
469  /* ------- GPIO Group GPP_H ------- */
470  /* GPP_H0 - GPIO */
472  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
474  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
475  /* GPP_H1 - GPIO */
476  PAD_CFG_GPI_TRIG_OWN(GPP_H1, NONE, RSMRST, OFF, ACPI),
477  /* GPP_H2 - GPIO */
479  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
481  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
482  /* GPP_H3 - GPIO */
484  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
486  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
487  /* GPP_H4 - GPIO */
489  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
491  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
492  /* GPP_H5 - RESERVED */
493  /* GPP_H6 - SRCCLKREQ12# */
494  PAD_CFG_NF(GPP_H6, NONE, RSMRST, NF1),
495  /* GPP_H7 - GPIO */
497  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
499  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
500  /* GPP_H8 - SRCCLKREQ14# */
501  PAD_CFG_NF(GPP_H8, NONE, RSMRST, NF1),
502  /* GPP_H9 - GPIO */
504  PAD_FUNC(GPIO) | PAD_RESET(RSMRST) |
506  PAD_CFG_OWN_GPIO(ACPI) | PAD_PULL(NONE)),
507  /* GPP_H10 - RESERVED */
508  /* GPP_H11 - RESERVED */
509  /* GPP_H12 - GPIO */
510  PAD_CFG_GPI_TRIG_OWN(GPP_H12, NONE, RSMRST, OFF, ACPI),
511  /* GPP_H13 - RESERVED */
512  /* GPP_H14 - RESERVED */
513  /* GPP_H15 - GPIO */
514  PAD_CFG_GPI_TRIG_OWN(GPP_H15, NONE, RSMRST, OFF, ACPI),
515  /* GPP_H16 - RESERVED */
516  /* GPP_H17 - RESERVED */
517  /* GPP_H18 - GPIO */
518  PAD_CFG_GPI_TRIG_OWN(GPP_H18, NONE, RSMRST, OFF, ACPI),
519  /* GPP_H19 - GPIO */
520  PAD_CFG_GPO(GPP_H19, 0, RSMRST),
521  /* GPP_H20 - SSATAXPCIE2 */
522  PAD_CFG_NF(GPP_H20, NONE, RSMRST, NF2),
523  /* GPP_H21 - GPIO */
524  PAD_CFG_GPO(GPP_H21, 0, RSMRST),
525  /* GPP_H22 - SSATAXPCIE4 */
526  PAD_CFG_NF(GPP_H22, NONE, RSMRST, NF2),
527  /* GPP_H23 - GPIO */
528  PAD_CFG_GPI_TRIG_OWN(GPP_H23, NONE, RSMRST, OFF, ACPI),
529 
530  /* ------- GPIO Group GPP_L ------- */
531  /* GPP_L0 - RESERVED */
532  /* GPP_L1 - CSME_INTR_OUT */
533  PAD_CFG_NF(GPP_L1, NONE, DEEP, NF1),
534  /* GPP_L2 - TESTCH0_D0 */
535  PAD_CFG_NF(GPP_L2, NONE, RSMRST, NF1),
536  /* GPP_L3 - TESTCH0_D1 */
537  PAD_CFG_NF(GPP_L3, NONE, RSMRST, NF1),
538  /* GPP_L4 - TESTCH0_D2 */
539  PAD_CFG_NF(GPP_L4, NONE, RSMRST, NF1),
540  /* GPP_L5 - TESTCH0_D3 */
541  PAD_CFG_NF(GPP_L5, NONE, RSMRST, NF1),
542  /* GPP_L6 - TESTCH0_D4 */
543  PAD_CFG_NF(GPP_L6, NONE, RSMRST, NF1),
544  /* GPP_L7 - TESTCH0_D5 */
545  PAD_CFG_NF(GPP_L7, NONE, RSMRST, NF1),
546  /* GPP_L8 - TESTCH0_D6 */
547  PAD_CFG_NF(GPP_L8, NONE, RSMRST, NF1),
548  /* GPP_L9 - TESTCH0_D7 */
549  PAD_CFG_NF(GPP_L9, NONE, RSMRST, NF1),
550  /* GPP_L10 - TESTCH0_CLK */
551  PAD_CFG_NF(GPP_L10, NONE, RSMRST, NF1),
552  /* GPP_L11 - TESTCH1_D0 */
553  PAD_CFG_NF(GPP_L11, NONE, RSMRST, NF1),
554  /* GPP_L12 - TESTCH1_D1 */
555  PAD_CFG_NF(GPP_L12, NONE, RSMRST, NF1),
556  /* GPP_L13 - TESTCH1_D2 */
557  PAD_CFG_NF(GPP_L13, NONE, RSMRST, NF1),
558  /* GPP_L14 - TESTCH1_D3 */
559  PAD_CFG_NF(GPP_L14, NONE, RSMRST, NF1),
560  /* GPP_L15 - TESTCH1_D4 */
561  PAD_CFG_NF(GPP_L15, NONE, RSMRST, NF1),
562  /* GPP_L16 - TESTCH1_D5 */
563  PAD_CFG_NF(GPP_L16, NONE, RSMRST, NF1),
564  /* GPP_L17 - TESTCH1_D6 */
565  PAD_CFG_NF(GPP_L17, NONE, RSMRST, NF1),
566  /* GPP_L18 - TESTCH1_D7 */
567  PAD_CFG_NF(GPP_L18, NONE, RSMRST, NF1),
568  /* GPP_L19 - TESTCH1_CLK */
569  PAD_CFG_NF(GPP_L19, NONE, RSMRST, NF1),
570 };
571 
572 #endif /* CFG_PCH_GPIO_H */
#define GPD11
#define GPP_A4
#define GPP_H22
#define GPP_C15
#define GPD3
#define GPP_H20
#define GPP_B6
Definition: gpio_soc_defs.h:59
#define GPP_H19
#define GPP_D1
#define GPD9
#define GPP_C2
#define GPP_D10
#define GPP_D8
#define GPP_D17
#define GPP_E3
#define GPP_A18
#define GPP_F21
#define GPP_C12
#define GPP_F12
#define GPP_F16
#define GPP_H15
#define GPP_E0
#define GPP_F6
#define GPP_H18
#define GPP_D14
#define GPP_B1
Definition: gpio_soc_defs.h:54
#define GPP_F20
#define GPP_F23
#define GPP_C5
#define GPP_A14
#define GPP_B12
Definition: gpio_soc_defs.h:65
#define GPP_D12
#define GPP_B16
Definition: gpio_soc_defs.h:69
#define GPP_A5
#define GPP_B2
Definition: gpio_soc_defs.h:55
#define GPP_D7
#define GPP_B13
Definition: gpio_soc_defs.h:66
#define GPP_E6
#define GPP_F0
#define GPP_D6
#define GPP_D2
#define GPP_H12
#define GPP_H6
#define GPP_C9
#define GPP_H2
#define GPP_C22
#define GPP_H9
#define GPP_D9
#define GPP_F5
#define GPP_B15
Definition: gpio_soc_defs.h:68
#define GPP_A2
#define GPP_H21
#define GPP_C23
#define GPP_C8
#define GPP_D11
#define GPP_H7
#define GPP_A6
#define GPP_H1
#define GPP_C11
#define GPP_D5
#define GPP_B22
Definition: gpio_soc_defs.h:75
#define GPP_A23
#define GPP_C18
#define GPP_F9
#define GPP_C13
#define GPP_E9
#define GPP_C17
#define GPP_E8
#define GPP_A7
#define GPP_E5
#define GPP_A0
#define GPD7
#define GPP_B8
Definition: gpio_soc_defs.h:61
#define GPP_B20
Definition: gpio_soc_defs.h:73
#define GPP_A20
#define GPP_A16
#define GPP_F1
#define GPP_F17
#define GPP_A12
#define GPP_F15
#define GPP_D4
#define GPP_C10
#define GPD2
#define GPP_F10
#define GPP_A3
#define GPP_E7
#define GPP_C16
#define GPP_F7
#define GPD1
#define GPP_F13
#define GPP_D18
#define GPP_B19
Definition: gpio_soc_defs.h:72
#define GPP_E2
#define GPP_H0
#define GPP_C21
#define GPP_B9
Definition: gpio_soc_defs.h:62
#define GPD10
#define GPP_F14
#define GPP_H3
#define GPP_F4
#define GPP_A10
#define GPP_A8
#define GPP_D0
#define GPP_A1
#define GPP_B14
Definition: gpio_soc_defs.h:67
#define GPP_D13
#define GPP_B18
Definition: gpio_soc_defs.h:71
#define GPP_B5
Definition: gpio_soc_defs.h:58
#define GPP_B0
Definition: gpio_soc_defs.h:53
#define GPP_A11
#define GPP_C14
#define GPP_A15
#define GPP_A9
#define GPP_E10
#define GPP_F8
#define GPP_C19
#define GPD8
#define GPP_A13
#define GPP_A21
#define GPP_B23
Definition: gpio_soc_defs.h:76
#define GPP_B10
Definition: gpio_soc_defs.h:63
#define GPP_D19
#define GPP_F2
#define GPP_E11
#define GPD6
#define GPP_F18
#define GPP_B3
Definition: gpio_soc_defs.h:56
#define GPP_A22
#define GPP_F22
#define GPP_D15
#define GPP_F11
#define GPP_B21
Definition: gpio_soc_defs.h:74
#define GPD4
#define GPP_B4
Definition: gpio_soc_defs.h:57
#define GPP_D16
#define GPP_F3
#define GPP_E12
#define GPP_A17
#define GPP_B17
Definition: gpio_soc_defs.h:70
#define GPP_E4
#define GPD5
#define GPP_E1
#define GPP_H8
#define GPP_F19
#define GPP_H4
#define GPP_H23
#define GPP_B7
Definition: gpio_soc_defs.h:60
#define GPP_D3
#define GPP_D23
#define GPP_G1
Definition: gpio_soc_defs.h:89
#define GPP_G7
Definition: gpio_soc_defs.h:95
#define GPP_D22
#define GPP_G4
Definition: gpio_soc_defs.h:92
#define GPP_G2
Definition: gpio_soc_defs.h:90
#define GPP_D21
#define GPP_G6
Definition: gpio_soc_defs.h:94
#define GPP_G0
Definition: gpio_soc_defs.h:88
#define GPP_D20
#define GPP_G3
Definition: gpio_soc_defs.h:91
#define GPP_G5
Definition: gpio_soc_defs.h:93
@ GPIO
Definition: chip.h:84
#define GPP_G21
#define GPP_G16
Definition: gpio_soc_defs.h:98
#define GPP_G8
Definition: gpio_soc_defs.h:90
#define GPP_G12
Definition: gpio_soc_defs.h:94
#define GPP_G15
Definition: gpio_soc_defs.h:97
#define GPP_G17
Definition: gpio_soc_defs.h:99
#define GPP_G11
Definition: gpio_soc_defs.h:93
#define GPP_G23
#define GPP_G18
#define GPP_G19
#define GPP_G13
Definition: gpio_soc_defs.h:95
#define GPP_G14
Definition: gpio_soc_defs.h:96
#define GPP_G10
Definition: gpio_soc_defs.h:92
#define GPP_G22
#define GPP_G9
Definition: gpio_soc_defs.h:91
#define GPP_K4
#define GPP_I5
#define GPP_J7
#define GPP_J4
#define GPP_K2
#define GPP_K9
#define GPP_J5
#define GPP_I10
#define GPP_J8
#define GPP_J0
#define GPP_J2
#define GPP_J9
#define GPP_I8
#define GPP_J1
#define GPP_J6
#define GPP_I7
#define GPP_I3
#define GPP_I6
#define GPP_J10
#define GPP_K7
#define GPP_I9
#define GPP_K1
#define GPP_I2
#define GPP_J11
#define GPP_J3
#define GPP_I0
#define GPP_K10
#define GPP_K5
#define GPP_K6
#define GPP_K0
#define GPP_I4
#define GPP_K3
#define GPP_I1
#define GPP_K8
#define GPP_L2
#define GPP_L3
#define GPP_J18
#define GPP_J17
#define GPP_J14
#define GPP_J19
#define GPP_L6
#define GPP_L19
#define GPP_L17
#define GPP_J22
#define GPP_L18
#define GPP_L14
#define GPP_J23
#define GPP_L13
#define GPP_L9
#define GPP_L4
#define GPP_L7
#define GPP_J15
#define GPP_L5
#define GPP_J16
#define GPP_L8
#define GPP_L1
#define GPP_J20
#define GPP_L10
#define GPP_J13
#define GPP_L11
#define GPP_L16
#define GPP_L15
#define GPP_L12
#define GPP_J12
#define GPP_J21
#define PAD_FUNC(name, func)
Definition: bootblock.c:18
static const struct pad_config gpio_table[]
Definition: gpio.h:9
#define PAD_PULL(TERM)
Definition: gpio.h:155
#define PAD_BUF(value)
Definition: gpio_defs.h:143
#define PAD_CFG_GPI(pad, pull, rst)
Definition: gpio_defs.h:284
#define _PAD_CFG_STRUCT(__pad, __config0, __config1)
Definition: gpio_defs.h:166
#define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:412
#define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
Definition: gpio_defs.h:311
#define PAD_CFG0_TRIG_OFF
Definition: gpio_defs.h:38
#define PAD_CFG_NF(pad, pull, rst, func)
Definition: gpio_defs.h:197
#define PAD_RESET(value)
Definition: gpio_defs.h:129
#define PAD_CFG_OWN_GPIO(own)
Definition: gpio_defs.h:56
#define PAD_CFG0_RX_POL_NONE
Definition: gpio_defs.h:33
#define PAD_CFG_GPO(pad, val, rst)
Definition: gpio_defs.h:247
#define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:432