coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lpc.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <device/pci.h>
5 #include <pc80/isa-dma.h>
6 #include <pc80/i8259.h>
7 #include <arch/ioapic.h>
8 #include <intelblocks/itss.h>
9 #include <intelblocks/lpc_lib.h>
10 #include <soc/iomap.h>
11 #include <soc/pcr_ids.h>
13 
14 #include "chip.h"
15 
17 {
18  const config_t *config = config_of_soc();
19 
20  gen_io_dec[0] = config->gen1_dec;
21  gen_io_dec[1] = config->gen2_dec;
22  gen_io_dec[2] = config->gen3_dec;
23  gen_io_dec[3] = config->gen4_dec;
24 }
25 
26 void lpc_soc_init(struct device *dev)
27 {
28  const config_t *const config = config_of(dev);
29 
30  /* Legacy initialization */
31  isa_dma_init();
32  pch_misc_init();
33 
34  /* Enable BIOS updates outside of SMM */
35  pci_and_config8(PCH_DEV_LPC, 0xdc, ~(1 << 5));
36 
37  /* Enable CLKRUN_EN for power gating LPC */
39 
40  /* Set LPC Serial IRQ mode */
41  lpc_set_serirq_mode(config->serirq_mode);
42 
43  /* Interrupt configuration */
45  pch_pirq_init();
46  setup_i8259();
48 }
void setup_i8259(void)
Definition: i8259.c:46
void i8259_configure_irq_trigger(int int_num, int is_level_triggered)
Configure IRQ triggering in the i8259 compatible Interrupt Controller.
Definition: i8259.c:99
static DEVTREE_CONST void * config_of(const struct device *dev)
Definition: device.h:382
#define config_of_soc()
Definition: device.h:394
static __always_inline void pci_and_config8(const struct device *dev, u16 reg, u8 andmask)
Definition: pci_ops.h:136
void isa_dma_init(void)
Definition: isa-dma.c:35
void lpc_enable_pci_clk_cntl(void)
Definition: lpc_lib.c:292
void lpc_set_serirq_mode(enum serirq_mode mode)
Definition: lpc_lib.c:226
#define LPC_NUM_GENERIC_IO_RANGES
Definition: lpc_lib.h:26
enum board_config config
Definition: memory.c:448
#define PCH_DEV_LPC
Definition: pci_devs.h:224
void lpc_soc_init(struct device *dev)
Definition: lpc.c:10
static void pch_misc_init(struct device *dev)
Definition: lpc.c:166
void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
Definition: lpc.c:20
static void pch_enable_ioapic(struct device *dev)
Set miscellaneous static southbridge features.
Definition: lpc.c:32
static void pch_pirq_init(struct device *dev)
Definition: lpc.c:100
unsigned int uint32_t
Definition: stdint.h:14
Definition: device.h:107