16 switch (CONFIG_UART_FOR_CONSOLE) {
17 case 0:
return PCI_DEV(0, 0x15, 5);
18 case 1:
return PCI_DEV(0, 0x15, 6);
38 void *
const bar = (
void *)(
uintptr_t)CONFIG_CONSOLE_UART_BASE_ADDRESS;
static void write32(void *addr, uint32_t val)
#define dead_code_t(type)
#define SIO_REG_PPR_RST_ASSERT
#define SIO_REG_PPR_CLOCK_EN
#define SIO_REG_PPR_GEN_LTR_MODE_MASK
#define SIO_REG_PPR_CLOCK_UPDATE
#define SIO_REG_PPR_CLOCK_M_DIV
#define SIO_REG_PPR_CLOCK
#define SIO_REG_PPR_CLOCK_N_DIV
#define setbits32(addr, set)
#define clrbits32(addr, clear)
static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val)
static __always_inline void pci_or_config16(const struct device *dev, u16 reg, u16 ormask)
#define PCI_COMMAND_MEMORY
#define PCI_BASE_ADDRESS_0
#define PCI_DEV(SEGBUS, DEV, FN)
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue)
static pci_devfn_t get_uart_pci_device(void)
void uart_bootblock_init(void)