coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <cpu/x86/smm.h>
5 #include <soc/nvs.h>
11 #include <ec/compal/ene932/ec.h>
12 #include "ec.h"
13 
14 static u8 mainboard_smi_ec(void)
15 {
16  u8 src;
17 
18  ec_kbc_write_cmd(0x56);
19  src = ec_kbc_read_ob();
20  printk(BIOS_DEBUG, "%s src: %x\n", __func__, src);
21 
22  switch (src) {
24  break;
25  case EC_LID_CLOSE:
26  printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
27 
28  /* Go to S5 */
30  break;
31  }
32 
33  return src;
34 }
35 
36 void mainboard_smi_gpi(u32 gpi_sts)
37 {
38  if (gpi_sts & (1 << EC_SMI_GPI)) {
39  /* Process all pending events from EC */
40  do {} while (mainboard_smi_ec() != EC_NO_EVENT);
41  } else if (gpi_sts & (1 << EC_LID_GPI)) {
42  printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
43 
44  /* Go to S5 */
46  }
47 }
48 
49 void mainboard_smi_sleep(u8 slp_typ)
50 {
51  /* Disable SCI and SMI events */
52 
53  /* Clear pending events that may trigger immediate wake */
54 
55  /* Enable wake events */
56 
57  /* Tell the EC to Disable USB power */
58  if (gnvs->s3u0 == 0 && gnvs->s3u1 == 0) {
59  ec_kbc_write_cmd(0x45);
60  ec_kbc_write_ib(0xF2);
61  }
62 }
63 
65 {
66  switch (apmc) {
68  /* Clear all pending events */
69  /* EC cmd:59 data:E8 */
70  ec_kbc_write_cmd(0x59);
71  ec_kbc_write_ib(0xE8);
72 
73  /* Set LID GPI to generate SCIs */
75  break;
77  /* Clear all pending events */
78  /* EC cmd:59 data:e9 */
79  ec_kbc_write_cmd(0x59);
80  ec_kbc_write_ib(0xE9);
81 
82  /* Set LID GPI to generate SMIs */
84  break;
85  }
86  return 0;
87 }
#define PM1_CNT
Definition: pm.h:27
#define printk(level,...)
Definition: stdlib.h:16
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
void __weak mainboard_smi_gpi(u32 gpi_sts)
Definition: smihandler.c:208
u8 ec_kbc_read_ob(void)
Definition: ec.c:71
void ec_kbc_write_ib(u8 data)
Definition: ec.c:83
void ec_kbc_write_cmd(u8 cmd)
Definition: ec.c:77
#define APM_CNT_ACPI_DISABLE
Definition: smm.h:21
#define APM_CNT_ACPI_ENABLE
Definition: smm.h:22
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define EC_SMI_GPI
Definition: ec.h:10
#define EC_LID_GPI
Definition: ec.h:8
#define EC_BATTERY_CRITICAL
Definition: ec.h:28
#define EC_LID_CLOSE
Definition: ec.h:21
#define EC_NO_EVENT
Definition: ec.h:13
static u8 mainboard_smi_ec(void)
Definition: smihandler.c:14
#define GPI_IS_SMI
Definition: smihandler.c:34
#define GPI_IS_SCI
Definition: smihandler.c:35
u32 read_pmbase32(const u8 addr)
Definition: pmbase.c:57
void write_pmbase32(const u8 addr, const u32 val)
Definition: pmbase.c:36
struct global_nvs * gnvs
void gpi_route_interrupt(u8 gpi, u8 mode)
Definition: smihandler.c:25
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45
u8 s3u0
Definition: nvs.h:34
u8 s3u1
Definition: nvs.h:35