coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
Macros | Variables
gen1.h File Reference
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Macros

#define GEN1_PCI_RESET_RESUMEWELL_GPIO   3
 
#define GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO   5
 

Variables

static const struct reg_script gen1_gpio_init []
 
static const struct reg_script gen1_hsuart0_0x20 []
 
static const struct reg_script gen1_hsuart0_0x21 []
 
static const struct reg_script gen1_i2c_0x20_init []
 
static const struct reg_script gen1_i2c_0x21_init []
 
static const struct reg_script gen1_tpm_reset_0x20 []
 
static const struct reg_script gen1_tpm_reset_0x21 []
 

Macro Definition Documentation

◆ GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO

#define GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO   5

Definition at line 7 of file gen1.h.

◆ GEN1_PCI_RESET_RESUMEWELL_GPIO

#define GEN1_PCI_RESET_RESUMEWELL_GPIO   3

Definition at line 4 of file gen1.h.

Variable Documentation

◆ gen1_gpio_init

const struct reg_script gen1_gpio_init[]
static

Definition at line 1 of file gen1.h.

Referenced by car_mainboard_pre_console_init().

◆ gen1_hsuart0_0x20

const struct reg_script gen1_hsuart0_0x20[]
static
Initial value:
= {
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 3),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, ~BIT5),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_OUTPUT3, ~BIT5),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 3),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, ~BIT4),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_OUTPUT3, ~BIT4),
REG_LEG_GPIO_OR(R_QNC_GPIO_RGEN_RESUME_WELL, BIT2),
REG_LEG_GPIO_AND(R_QNC_GPIO_RGIO_RESUME_WELL, ~BIT2),
REG_LEG_GPIO_OR(R_QNC_GPIO_RGLVL_RESUME_WELL, BIT2),
REG_SCRIPT_END
}
BIT2
#define BIT2
Definition: Ioh.h:9
BIT4
#define BIT4
Definition: Ioh.h:11
BIT5
#define BIT5
Definition: Ioh.h:12
R_QNC_GPIO_RGEN_RESUME_WELL
#define R_QNC_GPIO_RGEN_RESUME_WELL
Definition: QuarkNcSocId.h:475
R_QNC_GPIO_RGLVL_RESUME_WELL
#define R_QNC_GPIO_RGLVL_RESUME_WELL
Definition: QuarkNcSocId.h:477
R_QNC_GPIO_RGIO_RESUME_WELL
#define R_QNC_GPIO_RGIO_RESUME_WELL
Definition: QuarkNcSocId.h:476
GEN1_I2C_GPIO_EXP_0x20
@ GEN1_I2C_GPIO_EXP_0x20
Definition: reg_access.h:18
GEN1_GPIO_EXP_OUTPUT3
#define GEN1_GPIO_EXP_OUTPUT3
Definition: reg_access.h:37
REG_I2C_WRITE
#define REG_I2C_WRITE(slave_addr_, reg_, value_)
Definition: reg_access.h:69
GEN1_GPIO_EXP_PORT_SELECT
#define GEN1_GPIO_EXP_PORT_SELECT
Definition: reg_access.h:40
REG_I2C_AND
#define REG_I2C_AND(slave_addr_, reg_, value_)
Definition: reg_access.h:71
GEN1_GPIO_EXP_PORT_DIR
#define GEN1_GPIO_EXP_PORT_DIR
Definition: reg_access.h:41
REG_SCRIPT_END
#define REG_SCRIPT_END
Definition: reg_script.h:427
REG_LEG_GPIO_AND
#define REG_LEG_GPIO_AND(reg_, value_)
Definition: reg_access.h:128
REG_LEG_GPIO_OR
#define REG_LEG_GPIO_OR(reg_, value_)
Definition: reg_access.h:134

Definition at line 1 of file gen1.h.

Referenced by car_mainboard_pre_console_init().

◆ gen1_hsuart0_0x21

const struct reg_script gen1_hsuart0_0x21[]
static
Initial value:
= {
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 3),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, ~BIT5),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_OUTPUT3, ~BIT5),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 3),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, ~BIT4),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_OUTPUT3, ~BIT4),
REG_LEG_GPIO_OR(R_QNC_GPIO_RGEN_RESUME_WELL, BIT2),
REG_LEG_GPIO_AND(R_QNC_GPIO_RGIO_RESUME_WELL, ~BIT2),
REG_LEG_GPIO_OR(R_QNC_GPIO_RGLVL_RESUME_WELL, BIT2),
REG_SCRIPT_END
}
GEN1_I2C_GPIO_EXP_0x21
@ GEN1_I2C_GPIO_EXP_0x21
Definition: reg_access.h:19

Definition at line 1 of file gen1.h.

Referenced by car_mainboard_pre_console_init().

◆ gen1_i2c_0x20_init

const struct reg_script gen1_i2c_0x20_init[]
static
Initial value:
= {
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 1),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, ~BIT5),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_OUTPUT1, ~BIT5),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 5),
REG_I2C_OR(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, BIT1 | BIT0),
REG_SCRIPT_END
}
BIT1
#define BIT1
Definition: Ioh.h:8
BIT0
#define BIT0
Definition: Ioh.h:7
GEN1_GPIO_EXP_OUTPUT1
#define GEN1_GPIO_EXP_OUTPUT1
Definition: reg_access.h:35
REG_I2C_OR
#define REG_I2C_OR(slave_addr_, reg_, value_)
Definition: reg_access.h:77

Definition at line 1 of file gen1.h.

Referenced by mainboard_gpio_i2c_init(), and verstage_mainboard_init().

◆ gen1_i2c_0x21_init

const struct reg_script gen1_i2c_0x21_init[]
static
Initial value:
= {
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 1),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, ~BIT5),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_OUTPUT1, ~BIT5),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 5),
REG_I2C_OR(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, BIT1 | BIT0),
REG_SCRIPT_END
}

Definition at line 1 of file gen1.h.

Referenced by mainboard_gpio_i2c_init(), and verstage_mainboard_init().

◆ gen1_tpm_reset_0x20

const struct reg_script gen1_tpm_reset_0x20[]
static
Initial value:
= {
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_OUTPUT5, ~BIT1),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 5),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, ~BIT1),
TIME_DELAY_USEC(5),
REG_I2C_OR(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, BIT1),
REG_SCRIPT_END
}
GEN1_GPIO_EXP_OUTPUT5
#define GEN1_GPIO_EXP_OUTPUT5
Definition: reg_access.h:39
TIME_DELAY_USEC
#define TIME_DELAY_USEC(value_)
Definition: reg_access.h:209

Definition at line 1 of file gen1.h.

Referenced by vboot_platform_prepare_reboot().

◆ gen1_tpm_reset_0x21

const struct reg_script gen1_tpm_reset_0x21[]
static
Initial value:
= {
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_OUTPUT5, ~BIT1),
REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 5),
REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, ~BIT1),
TIME_DELAY_USEC(5),
REG_I2C_OR(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, BIT1),
REG_SCRIPT_END
}

Definition at line 1 of file gen1.h.

Referenced by vboot_platform_prepare_reboot().