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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <arch/cpu.h>
#include <acpi/acpi_gnvs.h>
#include <acpi/acpi_pm.h>
#include <bootstate.h>
#include <console/console.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cr.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <soc/device_nvs.h>
#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/msr.h>
#include <soc/nvs.h>
#include <soc/pattrs.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/ramstage.h>
#include <soc/iosf.h>
Go to the source code of this file.
Macros | |
#define | SHOW_PATTRS 1 |
Functions | |
static void | detect_num_cpus (struct pattrs *attrs) |
static void | fill_in_msr (msr_t *msr, int idx) |
static void | fill_in_pattrs (void) |
size_t | size_of_dnvs (void) |
static void | pm_fill_gnvs (struct global_nvs *gnvs, const struct chipset_power_state *ps) |
static void | acpi_save_wake_source (void *unused) |
BOOT_STATE_INIT_ENTRY (BS_PRE_DEVICE, BS_ON_ENTRY, acpi_save_wake_source, NULL) | |
static void | baytrail_enable_2x_refresh_rate (void) |
void | baytrail_init_pre_device (struct soc_intel_baytrail_config *config) |
Variables | |
struct pattrs | __global_pattrs |
static const char * | stepping_str [] |
#define SHOW_PATTRS 1 |
Definition at line 26 of file ramstage.c.
Definition at line 143 of file ramstage.c.
References acpi_pm_state_for_wake(), acpi_reset_gnvs_for_wake(), BIOS_DEBUG, gnvs, global_nvs::pm1i, pm_fill_gnvs(), and printk.
Definition at line 161 of file ramstage.c.
References iosf_dunit_read(), and iosf_dunit_write().
Referenced by baytrail_init_pre_device().
void baytrail_init_pre_device | ( | struct soc_intel_baytrail_config * | config | ) |
Definition at line 170 of file ramstage.c.
References baytrail_enable_2x_refresh_rate(), baytrail_init_scc(), baytrail_run_reference_code(), config, CR4_OSFXSR, CR4_OSXMMEXCPT, fill_in_pattrs(), gpio_config, mainboard_get_gpios(), read_cr4(), setup_soc_gpios(), and write_cr4().
Referenced by soc_init().
BOOT_STATE_INIT_ENTRY | ( | BS_PRE_DEVICE | , |
BS_ON_ENTRY | , | ||
acpi_save_wake_source | , | ||
NULL | |||
) |
Definition at line 30 of file ramstage.c.
References attrs, cpuid_ext(), cpuid_result::ebx, and cpuid_result::ecx.
Referenced by fill_in_pattrs().
Definition at line 49 of file ramstage.c.
References BIOS_DEBUG, msr_struct::hi, msr_struct::lo, printk, rdmsr(), and SHOW_PATTRS.
Referenced by fill_in_pattrs().
Definition at line 62 of file ramstage.c.
References ARRAY_SIZE, attrs, BIOS_DEBUG, bus_freq_khz(), cpuid_eax(), detect_num_cpus(), fill_in_msr(), IA32_PLATFORM_ID, IACORE_LFM, IACORE_MAX, IACORE_MIN, IACORE_TURBO, intel_microcode_find(), msr_struct::lo, LPC_DEV, LPC_FUNC, MSR_IACORE_RATIOS, MSR_IACORE_TURBO_RATIOS, MSR_IACORE_TURBO_VIDS, MSR_IACORE_VIDS, MSR_PLATFORM_INFO, pattrs_get(), pci_read_config8(), pcidev_on_root(), printk, rdmsr(), REVID, RID_A_STEPPING_START, RID_B_STEPPING_START, RID_C_STEPPING_START, RID_D_STEPPING_START, SHOW_PATTRS, STEP_A0, STEP_B0, STEP_C0, STEP_D0, and stepping_str.
Referenced by baytrail_init_pre_device().
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static |
Definition at line 125 of file ramstage.c.
References gnvs, chipset_power_state::pm1_en, chipset_power_state::pm1_sts, and global_nvs::pm1i.
Referenced by acpi_save_wake_source().
Definition at line 119 of file ramstage.c.
struct pattrs __global_pattrs |
Definition at line 1 of file ramstage.c.
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static |
Definition at line 58 of file ramstage.c.
Referenced by fill_in_pattrs().