14 #define SIO_PORT 0x164e
19 const u16 runtime_port = 0x180;
40 byte =
inb(runtime_port + 0xc);
42 outb(
byte, runtime_port + 0xc);
53 struct pei_data pei_data_template = {
55 .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
56 .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
57 .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
58 .pciexbar = CONFIG_ECAM_MMCONF_BASE_ADDRESS,
59 .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
70 .ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
72 .max_ddr3_freq = 1600,
#define HPET_BASE_ADDRESS
void outb(u8 val, u16 port)
void bootblock_mainboard_early_init(void)
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
const struct southbridge_usb_port mainboard_usb_ports[]
void mainboard_fill_pei_data(struct pei_data *pei)
int mainboard_should_reset_usb(int s3resume)
void read_spd(spd_raw_data *spd, u8 addr, bool id_only)
int sio1007_enable_uart_at(u16 port)
void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)