coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
usb_ehci.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include "pch.h"
8 #include <device/pci_ehci.h>
9 #include <device/mmio.h>
10 #include <device/pci_ops.h>
11 
12 static void usb_ehci_init(struct device *dev)
13 {
14  u32 reg32;
15 
16  /* Disable Wake on Disconnect in RMH */
17  reg32 = RCBA32(RMHWKCTL);
18  reg32 |= 0x22;
19  RCBA32(RMHWKCTL) = reg32;
20 
21  printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
22 
23  /* For others, done in MRC. */
24 #if CONFIG(USE_NATIVE_RAMINIT)
25  pci_write_config32(dev, 0x84, 0x930c8811);
26  pci_write_config32(dev, 0x88, 0x24000d30);
27  pci_write_config32(dev, 0xf4, 0x80408588);
28  pci_write_config32(dev, 0xf4, 0x80808588);
29  pci_write_config32(dev, 0xf4, 0x00808588);
30  pci_write_config32(dev, 0xfc, 0x205b1708);
31 #endif
32 
34  //pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_SERR);
35 
36  /* For others, done in MRC. */
37 #if CONFIG(USE_NATIVE_RAMINIT)
38  struct resource *res;
39  u8 access_cntl;
40 
41  access_cntl = pci_read_config8(dev, 0x80);
42 
43  /* Enable writes to protected registers. */
44  pci_write_config8(dev, 0x80, access_cntl | 1);
45 
47  if (res) {
48  /* Number of ports and companion controllers. */
49  reg32 = read32((void *)(uintptr_t)(res->base + 4));
50  write32((void *)(uintptr_t)(res->base + 4),
51  (reg32 & 0xfff00000) | 3);
52  }
53 
54  /* Restore protection. */
55  pci_write_config8(dev, 0x80, access_cntl);
56 #endif
57 
58  printk(BIOS_DEBUG, "done.\n");
59 }
60 
61 static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor,
62  unsigned int device)
63 {
64  u8 access_cntl;
65 
66  access_cntl = pci_read_config8(dev, 0x80);
67 
68  /* Enable writes to protected registers. */
69  pci_write_config8(dev, 0x80, access_cntl | 1);
70 
72 
73  /* Restore protection. */
74  pci_write_config8(dev, 0x80, access_cntl);
75 }
76 
77 static const char *usb_ehci_acpi_name(const struct device *dev)
78 {
79  switch (dev->path.pci.devfn) {
80  case PCI_DEVFN(0x1a, 0):
81  return "EHC2";
82  case PCI_DEVFN(0x1d, 0):
83  return "EHC1";
84  }
85  return NULL;
86 }
87 
88 static struct pci_operations lops_pci = {
89  .set_subsystem = &usb_ehci_set_subsystem,
90 };
91 
92 static struct device_operations usb_ehci_ops = {
94  .set_resources = pci_dev_set_resources,
95  .enable_resources = pci_dev_enable_resources,
96  .init = usb_ehci_init,
97  .ops_pci = &lops_pci,
98  .acpi_name = usb_ehci_acpi_name,
99 };
100 
101 static const unsigned short pci_device_ids[] = { 0x1c26, 0x1c2d, 0x1e26, 0x1e2d,
102  0 };
103 
104 static const struct pci_driver pch_usb_ehci __pci_driver = {
105  .ops = &usb_ehci_ops,
106  .vendor = PCI_VID_INTEL,
107  .devices = pci_device_ids,
108 };
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
static uint32_t read32(const void *addr)
Definition: mmio.h:22
int vendor
Definition: cpu.c:91
#define printk(level,...)
Definition: stdlib.h:16
struct resource * probe_resource(const struct device *dev, unsigned int index)
See if a resource structure already exists for a given index.
Definition: device_util.c:323
static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val)
Definition: pci_ops.h:76
static __always_inline void pci_or_config16(const struct device *dev, u16 reg, u16 ormask)
Definition: pci_ops.h:180
static __always_inline u8 pci_read_config8(const struct device *dev, u16 reg)
Definition: pci_ops.h:46
static __always_inline void pci_write_config8(const struct device *dev, u16 reg, u8 val)
Definition: pci_ops.h:64
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define PCI_DEVFN(slot, func)
Definition: pci_def.h:548
#define PCI_COMMAND_MASTER
Definition: pci_def.h:13
#define PCI_BASE_ADDRESS_0
Definition: pci_def.h:63
#define PCI_COMMAND
Definition: pci_def.h:10
void pci_dev_set_subsystem(struct device *dev, unsigned int vendor, unsigned int device)
Definition: pci_device.c:791
void pci_dev_enable_resources(struct device *dev)
Definition: pci_device.c:721
void pci_dev_set_resources(struct device *dev)
Definition: pci_device.c:691
#define pci_ehci_read_resources
Definition: pci_ehci.h:22
#define PCI_VID_INTEL
Definition: pci_ids.h:2157
#define RMHWKCTL
Definition: pch.h:392
static struct pci_operations lops_pci
Definition: usb_ehci.c:88
static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor, unsigned int device)
Definition: usb_ehci.c:61
static const struct pci_driver pch_usb_ehci __pci_driver
Definition: usb_ehci.c:104
static const unsigned short pci_device_ids[]
Definition: usb_ehci.c:101
static const char * usb_ehci_acpi_name(const struct device *dev)
Definition: usb_ehci.c:77
static struct device_operations usb_ehci_ops
Definition: usb_ehci.c:92
static void usb_ehci_init(struct device *dev)
Definition: usb_ehci.c:12
#define RCBA32(x)
Definition: rcba.h:14
#define NULL
Definition: stddef.h:19
uint32_t u32
Definition: stdint.h:51
unsigned long uintptr_t
Definition: stdint.h:21
uint8_t u8
Definition: stdint.h:45
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pci_path pci
Definition: path.h:116
Definition: device.h:107
struct device_path path
Definition: device.h:115
unsigned int devfn
Definition: path.h:54
resource_t base
Definition: resource.h:45