coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
northbridge.c File Reference
#include <cpu/cpu.h>
#include <console/console.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <commonlib/helpers.h>
#include <device/pci_ops.h>
#include <delay.h>
#include <cpu/intel/model_206ax/model_206ax.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <types.h>
#include "chip.h"
#include "sandybridge.h"
#include <cpu/intel/smm_reloc.h>
#include <security/intel/txt/txt_platform.h>
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Functions

bool is_sandybridge (void)
 
static const char * northbridge_acpi_name (const struct device *dev)
 
static void add_fixed_resources (struct device *dev, int index)
 
static uint64_t get_touud (const struct device *dev)
 
static void mc_read_resources (struct device *dev)
 
static void northbridge_dmi_init (struct device *dev)
 
static void disable_peg (void)
 
static void northbridge_init (struct device *dev)
 
void northbridge_write_smram (u8 smram)
 
static void set_above_4g_pci (const struct device *dev)
 
static void mc_gen_ssdt (const struct device *dev)
 
static void enable_dev (struct device *dev)
 

Variables

static uint64_t uma_memory_base = 0
 
static uint64_t uma_memory_size = 0
 
static const int legacy_hole_base_k = 0xa0000 / 1024
 
static const int legacy_hole_size_k = 384
 
static struct device_operations pci_domain_ops
 
static struct device_operations mc_ops
 
static const unsigned short pci_device_ids []
 
static const struct pci_driver mc_driver __pci_driver
 
static struct device_operations cpu_bus_ops
 
struct chip_operations northbridge_intel_sandybridge_ops
 

Function Documentation

◆ add_fixed_resources()

static void add_fixed_resources ( struct device dev,
int  index 
)
static

Definition at line 65 of file northbridge.c.

References bad_ram_resource, CAPID0_A, GFXVT_BASE, is_sandybridge(), legacy_hole_base_k, mmio_resource, pci_read_config32(), reserved_ram_resource, uma_memory_base, uma_memory_size, and VTVC0_BASE.

Referenced by mc_read_resources().

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◆ disable_peg()

static void disable_peg ( void  )
static

Definition at line 269 of file northbridge.c.

References BIOS_DEBUG, DEVEN, DEVEN_D4EN, DEVEN_D7EN, DEVEN_IGD, DEVEN_PEG10, DEVEN_PEG11, DEVEN_PEG12, DEVEN_PEG60, device::enabled, mchbar_clrbits32, mchbar_setbits32, pci_read_config32(), pci_write_config32(), pcidev_on_root(), PEGCTL, and printk.

Referenced by northbridge_init().

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◆ enable_dev()

static void enable_dev ( struct device dev)
static

◆ get_touud()

static uint64_t get_touud ( const struct device dev)
static

Definition at line 87 of file northbridge.c.

References pci_read_config32(), and TOUUD.

Referenced by mc_read_resources(), and set_above_4g_pci().

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◆ is_sandybridge()

bool is_sandybridge ( void  )

Definition at line 25 of file northbridge.c.

References BASE_REV_MASK, BASE_REV_SNB, PCI_DEVICE_ID, pci_read_config16(), and pcidev_on_root().

Referenced by add_fixed_resources(), gma_pm_init_post_vbios(), gma_pm_init_pre_vbios(), northbridge_dmi_init(), and northbridge_init().

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◆ mc_gen_ssdt()

static void mc_gen_ssdt ( const struct device dev)
static

Definition at line 396 of file northbridge.c.

References generate_cpu_entries(), and set_above_4g_pci().

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◆ mc_read_resources()

◆ northbridge_acpi_name()

static const char* northbridge_acpi_name ( const struct device dev)
static

◆ northbridge_dmi_init()

static void northbridge_dmi_init ( struct device dev)
static

Definition at line 227 of file northbridge.c.

References cpu_stepping(), dmibar_clrsetbits32(), dmibar_setbits32, dmibar_write32(), DMICESTS, DMILCTL, DMILLTC, DMIUESTS, is_sandybridge(), SNB_STEP_C0, SNB_STEP_D0, SNB_STEP_D1, and stepping.

Referenced by northbridge_init().

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◆ northbridge_init()

◆ northbridge_write_smram()

void northbridge_write_smram ( u8  smram)

Definition at line 378 of file northbridge.c.

References pci_write_config8(), pcidev_on_root(), and SMRAM.

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◆ set_above_4g_pci()

static void set_above_4g_pci ( const struct device dev)
static

Definition at line 383 of file northbridge.c.

References acpigen_pop_len(), acpigen_write_name_qword(), acpigen_write_scope(), BIOS_DEBUG, cpu_phys_address_size(), get_touud(), POWER_OF_2, and printk.

Referenced by mc_gen_ssdt().

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Variable Documentation

◆ __pci_driver

const struct pci_driver mc_driver __pci_driver
static
Initial value:
= {
.ops = &mc_ops,
.vendor = PCI_VID_INTEL,
.devices = pci_device_ids,
}
static struct device_operations mc_ops
Definition: northbridge.c:402
static const unsigned short pci_device_ids[]
Definition: northbridge.c:411
#define PCI_VID_INTEL
Definition: pci_ids.h:2157

Definition at line 411 of file northbridge.c.

◆ cpu_bus_ops

struct device_operations cpu_bus_ops
static
Initial value:
= {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
}
static void noop_read_resources(struct device *dev)
Standard device operations function pointers shims.
Definition: device.h:73
static void noop_set_resources(struct device *dev)
Definition: device.h:74
static void mp_cpu_bus_init(struct device *dev)
Definition: device.h:240

Definition at line 411 of file northbridge.c.

Referenced by enable_dev().

◆ legacy_hole_base_k

const int legacy_hole_base_k = 0xa0000 / 1024
static

Definition at line 38 of file northbridge.c.

Referenced by add_fixed_resources(), and mc_read_resources().

◆ legacy_hole_size_k

const int legacy_hole_size_k = 384
static

Definition at line 39 of file northbridge.c.

Referenced by mc_read_resources().

◆ mc_ops

struct device_operations mc_ops
static
Initial value:
= {
.read_resources = mc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.ops_pci = &pci_dev_ops_pci,
.acpi_fill_ssdt = mc_gen_ssdt,
}
static void mc_read_resources(struct device *dev)
Definition: northbridge.c:95
static void mc_gen_ssdt(const struct device *dev)
Definition: northbridge.c:396
static void northbridge_init(struct device *dev)
Definition: northbridge.c:329
void pci_dev_enable_resources(struct device *dev)
Definition: pci_device.c:721
struct pci_operations pci_dev_ops_pci
Default device operation for PCI devices.
Definition: pci_device.c:911
void pci_dev_set_resources(struct device *dev)
Definition: pci_device.c:691

Definition at line 396 of file northbridge.c.

◆ northbridge_intel_sandybridge_ops

struct chip_operations northbridge_intel_sandybridge_ops
Initial value:
= {
.enable_dev = enable_dev,
}
static void enable_dev(struct device *dev)
Definition: northbridge.c:429

Definition at line 429 of file northbridge.c.

◆ pci_device_ids

const unsigned short pci_device_ids[]
static
Initial value:
= {
0x0100, 0x0104, 0x0108,
0x0150, 0x0154, 0x0158,
0
}

Definition at line 411 of file northbridge.c.

◆ pci_domain_ops

struct device_operations pci_domain_ops
static
Initial value:
= {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.scan_bus = pci_domain_scan_bus,
.write_acpi_tables = northbridge_write_acpi_tables,
.acpi_name = northbridge_acpi_name,
}
unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start)
static const char * northbridge_acpi_name(const struct device *dev)
Definition: northbridge.c:41
void pci_domain_read_resources(struct device *dev)
Definition: pci_device.c:547
void pci_domain_set_resources(struct device *dev)
Definition: pci_device.c:564
void pci_domain_scan_bus(struct device *dev)
Scan a PCI domain.
Definition: pci_device.c:1610

Definition at line 41 of file northbridge.c.

Referenced by enable_dev().

◆ uma_memory_base

uint64_t uma_memory_base = 0
static

Definition at line 22 of file northbridge.c.

Referenced by add_fixed_resources(), mc_read_resources(), and mch_domain_read_resources().

◆ uma_memory_size

uint64_t uma_memory_size = 0
static

Definition at line 23 of file northbridge.c.

Referenced by add_fixed_resources(), mc_read_resources(), and mch_domain_read_resources().