coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
report_platform.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/cpu.h>
4 #include <device/pci_ops.h>
5 #include <console/console.h>
6 #include <cpu/intel/cpu_ids.h>
7 #include <cpu/intel/microcode.h>
8 #include <cpu/x86/msr.h>
9 #include <cpu/x86/name.h>
10 #include <device/pci.h>
11 #include <device/pci_ids.h>
12 #include <soc/romstage.h>
13 #include <soc/pci_devs.h>
14 
15 static struct {
17  const char *name;
18 } cpu_table[] = {
19  { CPUID_APOLLOLAKE_A0, "Apollolake A0" },
20  { CPUID_APOLLOLAKE_B0, "Apollolake B0" },
21  { CPUID_APOLLOLAKE_E0, "Apollolake E0" },
22  { CPUID_GLK_A0, "Geminilake A0" },
23  { CPUID_GLK_B0, "Geminilake B0" },
24  { CPUID_GLK_R0, "Geminilake R0" },
25 };
26 
27 static struct {
29  const char *name;
30 } mch_table[] = {
31  { PCI_DID_INTEL_GLK_NB, "Geminilake" },
32  { PCI_DID_INTEL_APL_NB, "Apollolake" },
33 };
34 
35 static struct {
37  const char *name;
38 } pch_table[] = {
39  { PCI_DID_INTEL_APL_LPC, "Apollolake" },
40  { PCI_DID_INTEL_GLK_LPC, "Geminilake" },
41  { PCI_DID_INTEL_GLK_ESPI, "Geminilake" },
42 };
43 
44 static struct {
46  const char *name;
47 } igd_table[] = {
48  { PCI_DID_INTEL_APL_IGD_HD_505, "Apollolake HD 505" },
49  { PCI_DID_INTEL_APL_IGD_HD_500, "Apollolake HD 500" },
50  { PCI_DID_INTEL_GLK_IGD, "Geminilake" },
51  { PCI_DID_INTEL_GLK_IGD_EU12, "Geminilake EU12" },
52 };
53 
55 {
56  return pci_read_config8(dev, PCI_REVISION_ID);
57 }
58 
60 {
61  return pci_read_config16(dev, PCI_DEVICE_ID);
62 }
63 
64 static void report_cpu_info(void)
65 {
66  uint32_t i, cpu_id, cpu_feature_flag;
67  char cpu_name[49];
68  const char *support = "Supported";
69  const char *no_support = "Not Supported";
70  const char *cpu_type = "Unknown";
71 
72  fill_processor_name(cpu_name);
74 
75  /* Look for string to match the name */
76  for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
77  if (cpu_table[i].cpuid == cpu_id) {
78  cpu_type = cpu_table[i].name;
79  break;
80  }
81  }
82 
83  printk(BIOS_INFO, "CPU: %s\n", cpu_name);
84  printk(BIOS_INFO, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type,
86 
87  cpu_feature_flag = cpu_get_feature_flags_ecx();
88  printk(BIOS_INFO, "CPU: AES %s, TXT %s, VT %s\n",
89  (cpu_feature_flag & CPUID_AES) ? support : no_support,
90  (cpu_feature_flag & CPUID_SMX) ? support : no_support,
91  (cpu_feature_flag & CPUID_VMX) ? support : no_support);
92 }
93 
94 static void report_mch_info(void)
95 {
96  uint32_t i;
98  uint16_t mchid = get_dev_id(dev);
99  uint8_t mch_revision = get_dev_revision(dev);
100  const char *mch_type = "Unknown";
101 
102  for (i = 0; i < ARRAY_SIZE(mch_table); i++) {
103  if (mch_table[i].mchid == mchid) {
104  mch_type = mch_table[i].name;
105  break;
106  }
107  }
108 
109  printk(BIOS_INFO, "MCH: device id %04x (rev %02x) is %s\n",
110  mchid, mch_revision, mch_type);
111 }
112 
113 static void report_pch_info(void)
114 {
115  uint32_t i;
116  pci_devfn_t dev = PCH_DEV_LPC;
117  uint16_t lpcid = get_dev_id(dev);
118  const char *pch_type = "Unknown";
119 
120  for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
121  if (pch_table[i].lpcid == lpcid) {
122  pch_type = pch_table[i].name;
123  break;
124  }
125  }
126  printk(BIOS_INFO, "PCH: device id %04x (rev %02x) is %s\n",
128 }
129 
130 static void report_igd_info(void)
131 {
132  uint32_t i;
133  pci_devfn_t dev = SA_DEV_IGD;
134  uint16_t igdid = get_dev_id(dev);
135  const char *igd_type = "Unknown";
136 
137  for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
138  if (igd_table[i].igdid == igdid) {
139  igd_type = igd_table[i].name;
140  break;
141  }
142  }
143  printk(BIOS_INFO, "IGD: device id %04x (rev %02x) is %s\n",
144  igdid, get_dev_revision(dev), igd_type);
145 }
146 
148 {
149  report_cpu_info();
150  report_mch_info();
151  report_pch_info();
152  report_igd_info();
153 }
cpu_type
Definition: cpu.h:347
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define printk(level,...)
Definition: stdlib.h:16
uint32_t cpu_get_feature_flags_ecx(void)
Definition: cpu_common.c:72
uint32_t cpu_get_cpuid(void)
Definition: cpu_common.c:63
#define CPUID_APOLLOLAKE_E0
Definition: cpu_ids.h:29
#define CPUID_APOLLOLAKE_A0
Definition: cpu_ids.h:27
#define CPUID_GLK_A0
Definition: cpu_ids.h:30
#define CPUID_GLK_R0
Definition: cpu_ids.h:32
#define CPUID_GLK_B0
Definition: cpu_ids.h:31
#define CPUID_APOLLOLAKE_B0
Definition: cpu_ids.h:28
#define CPUID_AES
Definition: msr.h:28
#define CPUID_VMX
Definition: msr.h:24
#define CPUID_SMX
Definition: msr.h:25
static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg)
Definition: pci_ops.h:52
static __always_inline u8 pci_read_config8(const struct device *dev, u16 reg)
Definition: pci_ops.h:46
#define BIOS_INFO
BIOS_INFO - Expected events.
Definition: loglevel.h:113
uint32_t get_current_microcode_rev(void)
Definition: microcode.c:112
void fill_processor_name(char *processor_name)
Definition: name.c:8
void report_platform_info(void)
#define PCI_DEVICE_ID
Definition: pci_def.h:9
#define PCI_REVISION_ID
Definition: pci_def.h:41
#define PCI_DID_INTEL_GLK_NB
Definition: pci_ids.h:3966
#define PCI_DID_INTEL_APL_LPC
Definition: pci_ids.h:2893
#define PCI_DID_INTEL_APL_NB
Definition: pci_ids.h:3965
#define PCI_DID_INTEL_GLK_LPC
Definition: pci_ids.h:2894
#define PCI_DID_INTEL_GLK_IGD_EU12
Definition: pci_ids.h:3847
#define PCI_DID_INTEL_GLK_ESPI
Definition: pci_ids.h:2895
#define PCI_DID_INTEL_APL_IGD_HD_505
Definition: pci_ids.h:3844
#define PCI_DID_INTEL_GLK_IGD
Definition: pci_ids.h:3846
#define PCI_DID_INTEL_APL_IGD_HD_500
Definition: pci_ids.h:3845
u32 pci_devfn_t
Definition: pci_type.h:8
u16 mchid
u16 igdid
const char * name
u32 cpuid
unsigned int cpu_id
Definition: chip.h:47
#define PCH_DEV_LPC
Definition: pci_devs.h:224
#define SA_DEV_IGD
Definition: pci_devs.h:33
static struct @494 igd_table[]
static struct @491 cpu_table[]
static void report_igd_info(void)
static void report_mch_info(void)
static uint16_t get_dev_id(pci_devfn_t dev)
static void report_pch_info(void)
u16 lpcid
static struct @492 mch_table[]
static struct @493 pch_table[]
static void report_cpu_info(void)
static uint8_t get_dev_revision(pci_devfn_t dev)
u16 pch_type(void)
Definition: pch.c:20
#define SA_DEV_ROOT
Definition: pci_devs.h:26
unsigned short uint16_t
Definition: stdint.h:11
unsigned int uint32_t
Definition: stdint.h:14
uint32_t u32
Definition: stdint.h:51
uint16_t u16
Definition: stdint.h:48
unsigned char uint8_t
Definition: stdint.h:8