15 #include <soc/pci_devs.h>
16 #include <soc/ramstage.h>
17 #include <soc/iomap.h>
25 #define PCH_REDIR_ETR 120
47 #define DEVFN(dev, fn) ((dev << 3) | (fn))
51 {.devfn =
DEVFN(0x06, 0), .ir = 4},
52 {.devfn =
DEVFN(0x09, 0), .ir = 7},
53 {.devfn =
DEVFN(0x0a, 0), .ir = 7},
54 {.devfn =
DEVFN(0x0b, 0), .ir = 7},
55 {.devfn =
DEVFN(0x0c, 0), .ir = 7},
56 {.devfn =
DEVFN(0x0e, 0), .ir = 8},
57 {.devfn =
DEVFN(0x0f, 0), .ir = 8},
58 {.devfn =
DEVFN(0x10, 0), .ir = 8},
59 {.devfn =
DEVFN(0x11, 0), .ir = 8},
60 {.devfn =
DEVFN(0x12, 0), .ir = 10},
61 {.devfn =
DEVFN(0x13, 0), .ir = 6},
62 {.devfn =
DEVFN(0x14, 0), .ir = 11},
63 {.devfn =
DEVFN(0x15, 0), .ir = 9},
64 {.devfn =
DEVFN(0x16, 0), .ir = 1},
65 {.devfn =
DEVFN(0x17, 0), .ir = 2},
66 {.devfn =
DEVFN(0x18, 0), .ir = 5},
67 {.devfn =
DEVFN(0x18, 1), .ir = 5},
68 {.devfn =
DEVFN(0x18, 2), .ir = 5},
69 {.devfn =
DEVFN(0x18, 3), .ir = 5},
70 {.devfn =
DEVFN(0x18, 4), .ir = 5},
71 {.devfn =
DEVFN(0x1a, 0), .ir = 10},
72 {.devfn =
DEVFN(0x1a, 1), .ir = 10},
73 {.devfn =
DEVFN(0x1a, 2), .ir = 10},
74 {.devfn =
DEVFN(0x1b, 0), .ir = 12},
75 {.devfn =
DEVFN(0x1b, 1), .ir = 12},
76 {.devfn =
DEVFN(0x1b, 2), .ir = 12},
77 {.devfn =
DEVFN(0x1b, 3), .ir = 12},
78 {.devfn =
DEVFN(0x1b, 4), .ir = 12},
79 {.devfn =
DEVFN(0x1c, 0), .ir = 12},
80 {.devfn =
DEVFN(0x1f, 0), .ir = 0},
81 {.devfn =
DEVFN(0x1f, 1), .ir = 0},
82 {.devfn =
DEVFN(0x1f, 4), .ir = 0},
83 {.devfn =
DEVFN(0x1f, 7), .ir = 0},
116 if (pin < 1 || pin > 4)
125 return ((pin - 1 +
devfn) % 4) + 1;
144 if (pin < 1 || pin > 4) {
146 goto dnv_get_ir_done;
156 goto dnv_get_ir_done;
202 goto dnv_get_ir_done;
205 ir >>= (pin - 1) * 4;
209 line =
config->pirqa_routing;
212 line =
config->pirqb_routing;
215 line =
config->pirqc_routing;
218 line =
config->pirqd_routing;
221 line =
config->pirqe_routing;
224 line =
config->pirqf_routing;
227 line =
config->pirqg_routing;
230 line =
config->pirqh_routing;
254 int8_t original_int_pin = 0, new_int_pin = 0, swiz_int_pin = 0;
259 goto dnv_get_int_line_done;
268 if (targ_dev ==
NULL || new_int_pin < 1)
269 goto dnv_get_int_line_done;
274 '@' + original_int_pin,
'@' + new_int_pin);
282 dev_path(targ_dev),
'@' + new_int_pin,
'@' + swiz_int_pin);
284 swiz_int_pin = new_int_pin;
290 dnv_get_int_line_done:
381 u8 int_pin = 0, int_line = 0;
390 irq_dev->
bus->
secondary, devfn >> 3, devfn & 0x7, int_pin, int_line);
405 res->
size = 16 * 1024 * 1024;
409 "Adding P2SB PCR config space BAR 0x%08lx-0x%08lx.\n",
410 (
unsigned long)(res->
base),
411 (
unsigned long)(res->
base + res->
size));
418 res->
size = 0x00001000;
426 (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0));
427 #if !CONFIG(SERIRQ_CONTINUOUS_MODE)
429 (1 << 7) | (0 << 6) | ((21 - 17) << 2) | (0 << 0));
469 res->
base = 0xff000000;
470 res->
size = 0x01000000;
525 #if CONFIG(HAVE_ACPI_TABLES)
535 static const struct pci_driver lpc_driver
__pci_driver = {
static void write8(void *addr, uint8_t val)
static void write32(void *addr, uint32_t val)
static void write16(void *addr, uint16_t val)
void setup_ioapic(void *ioapic_base, u8 ioapic_id)
void ioapic_set_max_vectors(void *ioapic_base, int mre_count)
#define PCR_ITSS_PIRQG_ROUT
#define PCR_ITSS_PIRQB_ROUT
#define PCR_ITSS_PIRQE_ROUT
#define PCR_ITSS_PIRQA_ROUT
#define PCR_ITSS_PIRQH_ROUT
#define PCR_ITSS_PIRQF_ROUT
#define PCR_ITSS_PIRQC_ROUT
#define PCR_ITSS_PIRQD_ROUT
#define printk(level,...)
#define PCH_PCR_ITSS_IPC1
Interrupt Polarity Control 1.
#define PCH_PCR_ITSS_IPC3
Interrupt Polarity Control 3.
#define PCH_PCR_ITSS_IPC0
Interrupt Polarity Control 0.
#define PCH_PCR_ITSS_IPC2
Interrupt Polarity Control 2.
#define PCH_PCR_ADDRESS(Pid, Offset)
DEVTREE_CONST struct device *DEVTREE_CONST all_devices
Linked list of ALL devices.
struct resource * new_resource(struct device *dev, unsigned int index)
See if a resource structure already exists for a given index and if not allocate one.
const char * dev_path(const struct device *dev)
static DEVTREE_CONST void * config_of(const struct device *dev)
static __always_inline void pci_or_config16(const struct device *dev, u16 reg, u16 ormask)
static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg)
static __always_inline u8 pci_read_config8(const struct device *dev, u16 reg)
static __always_inline void pci_write_config16(const struct device *dev, u16 reg, u16 val)
static __always_inline void pci_write_config8(const struct device *dev, u16 reg, u8 val)
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
#define PCI_COMMAND_SPECIAL
#define PCI_INTERRUPT_PIN
#define PCI_INTERRUPT_LINE
#define PCI_COMMAND_MASTER
#define PCI_COMMAND_MEMORY
void pci_dev_enable_resources(struct device *dev)
int get_pci_irq_pins(struct device *dev, struct device **parent_bdg)
Given a device structure 'dev', find its interrupt pin and its parent bridge 'parent_bdg' device stru...
void pci_dev_read_resources(struct device *dev)
void pci_dev_set_resources(struct device *dev)
#define PCI_DID_INTEL_DNV_LPC
#define IORESOURCE_SUBTRACTIVE
#define IORESOURCE_STORED
#define IORESOURCE_ASSIGNED
#define IOINDEX_SUBTRACTIVE(IDX, LINK)
void scan_static_bus(struct device *bus)
struct pci_operations soc_pci_ops
unsigned long southcluster_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp)
static struct device_operations device_ops
static void pch_enable_serial_irqs(struct device *dev)
static void lpc_read_resources(struct device *dev)
static void pch_hide_devfn(uint32_t devfn)
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL)
static void lpc_enable_resources(struct device *dev)
static void finalize_chipset(void *unused)
static void pch_lpc_add_io_resources(struct device *dev)
static void pci_p2sb_read_resources(struct device *dev)
void southcluster_enable_dev(struct device *dev)
static u8 dnv_get_int_line(struct device *irq_dev)
static void lpc_init(struct device *dev)
static void pch_decode_init(struct device *dev)
static void pch_enable_ioapic(struct device *dev)
Set miscellaneous static southbridge features.
static void pch_pirq_init(struct device *dev)
static void pch_lpc_add_mmio_resources(struct device *dev)
static int dnv_get_swizzled_pin(config_t *config, u8 devfn, u8 pin)
static int is_dnv_swizzled_rp(uint16_t bdf)
static const struct pci_driver lpc_driver __pci_driver
static int dnv_get_ir(config_t *config, u8 devfn, u8 pin)
void(* read_resources)(struct device *dev)
enum device_path_type type
DEVTREE_CONST struct bus * bus
DEVTREE_CONST struct device * next
DEVTREE_CONST void * chip_info