16 #include <soc/pci_devs.h>
18 #include <soc/southbridge.h>
24 #if CONFIG_PI_AGESA_TEMP_RAM_BASE < 0x100000
25 #error "Error: CONFIG_PI_AGESA_TEMP_RAM_BASE must be >= 1MB"
27 #if CONFIG_PI_AGESA_CAR_HEAP_BASE < 0x100000
28 #error "Error: CONFIG_PI_AGESA_CAR_HEAP_BASE must be >= 1MB"
114 if (
CONFIG(AMD_SOC_CONSOLE_UART))
115 assert(CONFIG_UART_FOR_CONSOLE >= 0
116 && CONFIG_UART_FOR_CONSOLE <= 1);
void enable_pci_mmconf(void)
static unsigned int cpuid_eax(unsigned int op)
#define assert(statement)
void * get_ap_entry_ptr(void)
#define printk(level,...)
void bootblock_soc_early_init(void)
void bootblock_soc_init(void)
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
void __noreturn halt(void)
halt the system reliably
static __always_inline msr_t rdmsr(unsigned int index)
void bootblock_main_with_basetime(uint64_t base_timestamp)
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size, unsigned int type)
void sb_reset_i2c_peripherals(const struct soc_i2c_peripheral_reset_info *reset_info)
void i2c_soc_early_init(void)
#define I2C_RESET_SCL_PIN(pin_name, pin_mask_value)
static const struct soc_i2c_scl_pin i2c_scl_pins[]
static void reset_i2c_peripherals(void)
static void amd_initmmio(void)
#define SOC_EARLY_VMTRR_FLASH
#define SOC_EARLY_VMTRR_CAR_HEAP
#define SOC_EARLY_VMTRR_TEMPRAM
unsigned long long uint64_t
void bootblock_fch_init(void)
void bootblock_fch_early_init(void)
Information about I2C peripherals that need to be reset.
const struct soc_i2c_scl_pin * i2c_scl
uint8_t i2c_scl_reset_mask
Data structure to identify GPIO to be toggled to reset peripherals on an I2C bus.
#define timestamp_get()
Workaround for guard combination above.
#define MTRR_TYPE_UNCACHEABLE
typedef void(X86APIP X86EMU_intrFuncs)(int num)