coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c File Reference
#include <bootblock_common.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <device/pci_def.h>
#include <program_loading.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/reg_access.h>
Include dependency graph for bootblock.c:

Go to the source code of this file.

Functions

void asmlinkage light_sd_led (void)
 
asmlinkage void bootblock_c_entry (uint64_t base_timestamp)
 
void bootblock_soc_early_init (void)
 
void bootblock_soc_init (void)
 
void platform_prog_run (struct prog *prog)
 

Variables

static const struct reg_script legacy_gpio_init []
 
static const struct reg_script i2c_gpio_controller_init []
 
static const struct reg_script hsuart_init []
 
static const struct reg_script mtrr_init []
 

Function Documentation

◆ bootblock_c_entry()

asmlinkage void bootblock_c_entry ( uint64_t  base_timestamp)

Definition at line 66 of file bootblock.c.

References bootblock_main_with_basetime(), CONFIG, and light_sd_led().

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◆ bootblock_soc_early_init()

void bootblock_soc_early_init ( void  )

◆ bootblock_soc_init()

void bootblock_soc_init ( void  )

Definition at line 96 of file bootblock.c.

References CONFIG, display_mtrrs(), and light_sd_led().

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◆ light_sd_led()

void asmlinkage light_sd_led ( void  )

Referenced by bootblock_c_entry(), bootblock_soc_early_init(), and bootblock_soc_init().

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◆ platform_prog_run()

void platform_prog_run ( struct prog prog)

Definition at line 104 of file bootblock.c.

References prog::arg, BIOS_SPEW, prog::entry, prog::name, and printk.

Variable Documentation

◆ hsuart_init

const struct reg_script hsuart_init[]
static
Initial value:
= {
}
#define UART_BASE_ADDRESS
Definition: iomap.h:11
#define PCI_COMMAND_MEMORY
Definition: pci_def.h:12
#define PCI_BASE_ADDRESS_0
Definition: pci_def.h:63
#define PCI_COMMAND
Definition: pci_def.h:10
#define REG_PCI_OR8(reg_, value_)
Definition: reg_script.h:183
#define REG_PCI_WRITE32(reg_, value_)
Definition: reg_script.h:169
#define REG_SCRIPT_END
Definition: reg_script.h:427

Definition at line 11 of file bootblock.c.

Referenced by bootblock_soc_early_init().

◆ i2c_gpio_controller_init

const struct reg_script i2c_gpio_controller_init[]
static
Initial value:

Definition at line 11 of file bootblock.c.

Referenced by bootblock_soc_early_init().

◆ legacy_gpio_init

const struct reg_script legacy_gpio_init[]
static
Initial value:
= {
}
#define R_QNC_LPC_GPE0BLK
Definition: QuarkNcSocId.h:520
#define R_QNC_LPC_GBA_BASE
Definition: QuarkNcSocId.h:461
#define LEGACY_GPIO_BASE_ADDRESS
Definition: iomap.h:29
#define IO_ADDRESS_VALID
Definition: iomap.h:32
#define GPE0_BASE_ADDRESS
Definition: iomap.h:23
#define PCI_COMMAND_IO
Definition: pci_def.h:11

Definition at line 11 of file bootblock.c.

Referenced by bootblock_soc_early_init().

◆ mtrr_init

const struct reg_script mtrr_init[]
static
Initial value:
= {
REG_MSR_WRITE(MTRR_PHYS_BASE(0), (uint32_t)((-CONFIG_ROM_SIZE)
REG_MSR_WRITE(MTRR_PHYS_MASK(0), (uint32_t)((-CONFIG_ROM_SIZE)
}
#define CR0_NW
Definition: cr.h:109
#define CR0_CD
Definition: cr.h:110
#define REG_MSR_WRITE(reg_, value_)
Definition: reg_script.h:395
#define REG_CPU_CR_AND(reg_, value_)
Definition: reg_access.h:44
unsigned int uint32_t
Definition: stdint.h:14
#define MTRR_TYPE_WRTHROUGH
Definition: mtrr.h:12
#define MTRR_PHYS_BASE(reg)
Definition: mtrr.h:39
#define MTRR_PHYS_MASK(reg)
Definition: mtrr.h:40
#define MTRR_DEF_TYPE_EN
Definition: mtrr.h:27
#define MTRR_TYPE_UNCACHEABLE
Definition: mtrr.h:10
#define MTRR_DEF_TYPE_MSR
Definition: mtrr.h:25
#define MTRR_PHYS_MASK_VALID
Definition: mtrr.h:41

Definition at line 11 of file bootblock.c.

Referenced by bootblock_soc_early_init().