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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <acpi/acpi.h>
#include <elog.h>
#include <acpi/acpigen.h>
#include <cpu/x86/smm.h>
#include "chip.h"
#include "pch.h"
#include <southbridge/intel/common/pciehp.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/spi.h>
#include <southbridge/intel/common/rcba_pirq.h>
Go to the source code of this file.
Macros | |
#define | NMI_OFF 0 |
Functions | |
static void | pch_enable_ioapic (struct device *dev) |
Set miscellaneous static southbridge features. More... | |
static void | pch_enable_serial_irqs (struct device *dev) |
static void | pch_pirq_init (struct device *dev) |
static void | pch_gpi_routing (struct device *dev) |
static void | pch_power_options (struct device *dev) |
static void | pch_rtc_init (struct device *dev) |
static void | mobile5_pm_init (struct device *dev) |
static void | enable_hpet (void) |
static void | enable_clock_gating (struct device *dev) |
static void | pch_set_acpi_mode (void) |
static void | pch_fixups (struct device *dev) |
static void | lpc_init (struct device *dev) |
static void | pch_lpc_read_resources (struct device *dev) |
static void | pch_lpc_enable (struct device *dev) |
static const char * | lpc_acpi_name (const struct device *dev) |
static void | southbridge_fill_ssdt (const struct device *device) |
static void | lpc_final (struct device *dev) |
Variables | |
static struct device_operations | device_ops |
static const unsigned short | pci_device_ids [] |
static const struct pci_driver pch_lpc | __pci_driver |
Definition at line 355 of file lpc.c.
References CG, GEN_PMCON_1, pci_read_config16(), pci_write_config16(), RCBA32, RCBA32_AND_OR, and RCBA32_OR.
Referenced by lpc_init().
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Definition at line 403 of file lpc.c.
References BIOS_DEBUG, enable_clock_gating(), enable_hpet(), i8259_configure_irq_trigger(), isa_dma_init(), mobile5_pm_init(), pch_enable_ioapic(), pch_enable_serial_irqs(), pch_fixups(), pch_pirq_init(), pch_power_options(), pch_rtc_init(), pch_set_acpi_mode(), printk, and setup_i8259().
Definition at line 257 of file lpc.c.
References ARRAY_SIZE, BIOS_DEBUG, pci_write_config8(), printk, RCBA32, and void().
Referenced by lpc_init().
Set miscellaneous static southbridge features.
dev | PCI device with I/O APIC control registers |
Definition at line 33 of file lpc.c.
References ioapic_lock_max_vectors(), setup_ioapic(), and VIO_APIC_VADDR.
Referenced by lpc_init().
Definition at line 41 of file lpc.c.
References pci_write_config8(), and SERIRQ_CNTL.
Referenced by lpc_init().
Definition at line 393 of file lpc.c.
References RCBA32_AND_OR, and RCBA32_OR.
Referenced by lpc_init().
Definition at line 111 of file lpc.c.
References device::chip_info, config, GPIO_ROUT, and pci_write_config32().
Referenced by pch_power_options().
Definition at line 505 of file lpc.c.
References DISPBDF, FD2, pch_enable(), PCH_ENABLE_DBDF, RCBA16, and RCBA32_OR.
Definition at line 444 of file lpc.c.
References resource::base, device::chip_info, config, resource::flags, IO_APIC_ADDR, IOINDEX_SUBTRACTIVE, IORESOURCE_ASSIGNED, IORESOURCE_FIXED, IORESOURCE_IO, IORESOURCE_MEM, IORESOURCE_SUBTRACTIVE, new_resource(), pci_dev_read_resources(), and resource::size.
Definition at line 73 of file lpc.c.
References all_devices, DEVICE_PATH_PCI, device::enabled, device::next, device::path, PCI_INTERRUPT_LINE, PCI_INTERRUPT_PIN, pci_read_config8(), pci_write_config8(), PIRQA_ROUT, PIRQB_ROUT, PIRQC_ROUT, PIRQD_ROUT, PIRQE_ROUT, PIRQF_ROUT, PIRQG_ROUT, PIRQH_ROUT, and device_path::type.
Referenced by lpc_init().
Definition at line 140 of file lpc.c.
References ALT_GP_SMI_EN, BIOS_INFO, device::chip_info, config, CONFIG, GEN_PMCON_1, GEN_PMCON_3, get_uint_option(), GPE0_EN, inb(), inl(), MAINBOARD_POWER_KEEP, MAINBOARD_POWER_OFF, MAINBOARD_POWER_ON, NMI_OFF, outb(), outl(), outw(), pch_gpi_routing(), pci_read_config16(), pci_write_config16(), pmbase, printk, PRSTS, and RCBA32.
Referenced by lpc_init().
Definition at line 240 of file lpc.c.
References BIOS_DEBUG, cmos_init(), elog_add_event(), ELOG_TYPE_RTC_RESET, GEN_PMCON_3, pci_read_config8(), pci_write_config8(), printk, RTC_BATTERY_DEAD, and rtc_failed().
Referenced by lpc_init().
Definition at line 386 of file lpc.c.
References acpi_is_wakeup_s3(), APM_CNT_ACPI_DISABLE, and apm_control().
Referenced by lpc_init().
Definition at line 519 of file lpc.c.
References chip, device::chip_info, intel_acpi_gen_def_acpi_pirq(), intel_acpi_pcie_hotplug_generator(), and pcidev_on_root().
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