12 #include <soc/pci_devs.h>
13 #include <soc/bootblock.h>
18 .Signature = FSPT_UPD_SIGNATURE,
23 .MicrocodeRegionBase = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LOC,
24 .MicrocodeRegionLength = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LEN,
30 .FsptPort80RouteDisable = 0,
31 .ReservedTempRamInitUpd = {0},
33 .UnusedUpdSpace0 = {0},
34 .UpdTerminator = 0x55AA,
72 if (
CONFIG(INTEL_CBNT_LOGGING))
void intel_cbnt_log_registers(void)
#define printk(level,...)
void bootblock_soc_early_init(void)
void bootblock_soc_init(void)
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
void fast_spi_early_init(uintptr_t spi_base_address)
void fast_spi_cache_bios_region(void)
void report_fspt_output(void)
void bootblock_main_with_basetime(uint64_t base_timestamp)
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
#define PCI_COMMAND_MEMORY
#define PCI_BASE_ADDRESS_0
static __always_inline uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
static __always_inline void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
static __always_inline void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
void bootblock_pch_init(void)
static void pch_enable_lpc(void)
const FSPT_UPD temp_ram_init_params
static uint64_t bootblock_timestamp
static uint64_t assembly_timestamp
unsigned long long uint64_t
#define timestamp_get()
Workaround for guard combination above.