coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <bootblock_common.h>
4 #include <device/pci.h>
5 #include <FsptUpd.h>
6 #include <intelblocks/fast_spi.h>
7 #include <soc/iomap.h>
8 #include <console/console.h>
9 #include <cpu/x86/mtrr.h>
10 #include <intelblocks/lpc_lib.h>
12 #include <soc/pci_devs.h>
13 #include <soc/bootblock.h>
14 #include <fsp/util.h>
15 
16 const FSPT_UPD temp_ram_init_params = {
17  .FspUpdHeader = {
18  .Signature = FSPT_UPD_SIGNATURE,
19  .Revision = 1,
20  .Reserved = {0},
21  },
22  .FsptCoreUpd = {
23  .MicrocodeRegionBase = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LOC,
24  .MicrocodeRegionLength = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LEN,
25  .CodeRegionBase = (UINT32)CACHE_ROM_BASE,
26  .CodeRegionLength = (UINT32)CACHE_ROM_SIZE,
27  .Reserved1 = {0},
28  },
29  .FsptConfig = {
30  .FsptPort80RouteDisable = 0,
31  .ReservedTempRamInitUpd = {0},
32  },
33  .UnusedUpdSpace0 = {0},
34  .UpdTerminator = 0x55AA,
35 };
36 
39 
41 {
42  /*
43  * FSP-T does not respect its own API and trashes registers
44  * coreboot uses to store its initial timestamp.
45  */
46  assembly_timestamp = base_timestamp;
49 
51 }
52 
54 {
57 
58  /* Set up P2SB BAR. This is needed for PCR to work */
61  pci_s_write_config32(PCH_DEV_P2SB, PCI_BASE_ADDRESS_0, CONFIG_PCR_BASE_ADDRESS);
62 }
63 
65 {
67  printk(BIOS_WARNING, "Invalid initial timestamp detected\n");
68 
69  if (CONFIG(FSP_CAR))
71 
72  if (CONFIG(INTEL_CBNT_LOGGING))
74 
76 }
#define SPI_BASE_ADDRESS
Definition: iomap.h:8
#define asmlinkage
Definition: cpu.h:8
#define MIN(a, b)
Definition: helpers.h:37
void intel_cbnt_log_registers(void)
Definition: logging.c:120
#define printk(level,...)
Definition: stdlib.h:16
void bootblock_soc_early_init(void)
Definition: bootblock.c:20
void bootblock_soc_init(void)
Definition: bootblock.c:27
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
Definition: bootblock.c:26
@ CONFIG
Definition: dsi_common.h:201
void fast_spi_early_init(uintptr_t spi_base_address)
Definition: fast_spi.c:378
void fast_spi_cache_bios_region(void)
Definition: fast_spi.c:292
void report_fspt_output(void)
Definition: fspt_report.c:11
void bootblock_main_with_basetime(uint64_t base_timestamp)
Definition: bootblock.c:71
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
Definition: loglevel.h:86
#define PCI_COMMAND_MEMORY
Definition: pci_def.h:12
#define PCI_BASE_ADDRESS_0
Definition: pci_def.h:63
#define PCI_COMMAND
Definition: pci_def.h:10
static __always_inline uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
Definition: pci_io_cfg.h:80
static __always_inline void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
Definition: pci_io_cfg.h:98
static __always_inline void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
Definition: pci_io_cfg.h:110
void bootblock_pch_init(void)
Definition: pch.c:114
#define PCH_DEV_P2SB
Definition: pci_devs.h:225
static void pch_enable_lpc(void)
Definition: early_pch.c:51
const FSPT_UPD temp_ram_init_params
Definition: bootblock.c:16
static uint64_t bootblock_timestamp
Definition: bootblock.c:38
static uint64_t assembly_timestamp
Definition: bootblock.c:37
unsigned long long uint64_t
Definition: stdint.h:17
unsigned char uint8_t
Definition: stdint.h:8
#define timestamp_get()
Workaround for guard combination above.
Definition: timestamp.h:52
#define CACHE_ROM_SIZE
Definition: mtrr.h:223
#define CACHE_ROM_BASE
Definition: mtrr.h:226